Question 7nm I/O die ready, what about GlobalFoundries?

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RetroZombie

Senior member
Nov 5, 2019
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AMD is aggressively pursuing high margins. (Basically, they are becoming the next Apple)

Also, if for some odd reason you don't believe this, watch/listen to their investor meetings/earnings reports, or simply ask yourself: what happened to the Ryzen budget parts?
Sorry I don't see it the same way you do.

Amd is pursuing high margins for sure but also higher price tiers for it's products.
If they keep it rolling, soon you can see on desktop 1500$ parts from then because they will be much better than the older parts and so much more expensive.

Do you think the Athlon 300ge/3000g is not cheap? or the ryzen 1600? what intel gives you for 50$? Or less than 100$?
 

RetroZombie

Senior member
Nov 5, 2019
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This thread makes no sense.
The 4000 mobile APU has no IO die.
I think he is arguing that with renoir at 7nm there are no longer reasons for amd not to go for 7nm for the io die like the chiplet.

I already explained here the reasons for it, but if the 7nm io die will really appear it's only when the cpu chiplet is made at 5nm.

And another reason to make the io die at tsmc 7nm instead of GF is the reuse the work already done with renoir at the io level.
 

GaiaHunter

Diamond Member
Jul 13, 2008
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I think he is arguing that with renoir at 7nm there are no longer reasons for amd not to go for 7nm for the io die like the chiplet.

And another reason to make the io die at tsmc 7nm instead of GF is the reuse the work already done with renoir at the io level.
The reason for 14/12 nm IO dies are price related not some technological difficulty.

Zen 3 might or might not have an IO die at 7nm and that will depend on several factors.

Also Renoir IO doesn't support PCIE4 and I pretty much doubt there is a segment of Renoir die that AMD would just cut off and have an IO die so the reuse the work (again IO at 7nm is no herculean feat of engineering) is not a very strong argument.

Especially when we already have 2 different IO dies one made on a 14 nm process that is 416 mm² with 8.34 billion transistors for Epyc/Treadripper and one made on a 12 nm process that is 125 mm² and 2.09 billion transistors for Ryzen 3000.

So which version of the IO dies does Renoir IO replace?
 
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ksec

Senior member
Mar 5, 2010
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There could be a possibility of Client IOD moving to 7nm or 6nm, once 5nm is up and running, so around Zen 3 Client CPU will be all TSMC.

That should bring the die size of cIOD to be sub 100mm. Economy of scale from smaller node on a fairly mature 6nm should bring this down to ~$10 a piece. i.e By that time any cost saving from GF should be negligible.

Which opens up a bit of capacity from GF. The Server IOD is massive at 416mm2. The maths is not going to work well on TSMC 6nm. On a larger die the yield and cost is still going to flavour a much cheaper GF wafer. Not to mention the Server IOD is still on 14nm, compared to Client IOD is already on 12nm. It makes much more sense for AMD to move Server IOD to 12nm+, or 10nm if GF continues its investment. That will likely happen in Zen 4 when AMD support PCI-E 5.0 and DDR5 which will require new IOD design anyway.

That is 2021 to 2024 until the WSA Ends. GF will then need to figure out what to do with their Fab 8.

Despite all the decent reviews, it was AMD's own fault for not better forecasting their sales which is why their Server market share is still a low single digit. Which is no where near good enough in my view.
 

beginner99

Diamond Member
Jun 2, 2009
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There could be a possibility of Client IOD moving to 7nm or 6nm, once 5nm is up and running, so around Zen 3 Client CPU will be all TSMC.
Zen 3 will still be 7nm (or derivative thereof) meaning using same fabs. 5nm will all go to Apple and huawei and co. If we assume zen 3 is Q3 2020 and Zen 4 for early 2022 (I expect usuall yit will take a bit more than 12 months for each iteration), then Zen 4 is earliest with 7nm IO die. But even then I doubt it. It's the cores that get larger IO doesn't really increase that much and 14/12nm should be very cheap that 7nm will not be worth it.

Only reason for 7nm is if AMD decides to put a basic iGPU on the IO die for the consumer part. That would still make sense. media encode/decode plus a small gpu.
 

DrMrLordX

Lifer
Apr 27, 2000
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Zen 3 will still be 7nm (or derivative thereof) meaning using same fabs.
7nm+ is EUV and uses different design rules than 7nm. Pretty sure that TSMC is fabbing 7nm+ at different fabs than 7nm.

5nm will all go to Apple and huawei and co.
Maybe at first. But 5nm is also an EUV node, and it uses the same design rules as 7nm+, so . . . might be retooled 7nm+ fabs.

Zen 4 for early 2022
Only if they really screw up something.

Only reason for 7nm is if AMD decides to put a basic iGPU on the IO die for the consumer part.
Or to wind down the HSA a bit (terms permitting). We also don't know anything about GF's capacity limits and whether or not those would be a long-term constraint on AMD chip supplies.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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Pretty sure that TSMC is fabbing 7nm+ at different fabs than 7nm.
TSMC is fabbing 7nm+ at the 10nm/7nm/6nm fab. The only node being fabricated by itself is the N5 node at Fab 18. 7nm+ has to compete with 6nm for EUV machines and 10nm/7nm for DUV machines.

There is also the notice TSMC pretty much killed N7+, it is officially limited use like 20SoC and 10FF. It was only meant to produce training/knowledge for the N6 and N5 processes. No one in their right mind will sacrifice themselves for half-node trash.

990 4G ~10% of 7nm and 990 5G ~70% of 7nm+ for 2020. Significantly less volume of 7nm+ than 7nm.
 
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NTMBK

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Nov 14, 2011
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There is also the notice TSMC pretty much killed N7+, it is officially limited use like 20SoC and 10FF. It was only meant to produce training/knowledge for the N6 and N5 processes. No one in their right mind will sacrifice themselves for half-node trash.
You know that Apple built the A8 SoC on "half-node trash", right? How many millions of those chips have they sold at this point?
 

maddie

Diamond Member
Jul 18, 2010
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You know that Apple built the A8 SoC on "half-node trash", right? How many millions of those chips have they sold at this point?
That thinking is like those fixating on an integer # for CPU GHz, not realizing the illusion of number bases. A nm is a nm, who cares if it's a half node or node.
 

ksec

Senior member
Mar 5, 2010
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Or to wind down the HSA a bit (terms permitting). We also don't know anything about GF's capacity limits and whether or not those would be a long-term constraint on AMD chip supplies.
That was my point exactly. But I just did some napkin maths again. Even if GF 12/14nm has roughly just 50,000 wafer per month, ( That is dependant on lots of factors ). That equates to 5M Server IOD or 27.5M Client IOD per month.

Doesn't seems like a constraint to me. So I guess that my original reasoning were wrong.
 

chrisjames61

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Dec 31, 2013
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That only works if you can subsidize by using other profitable products. Once that ability goes away, or is substantially curtailed, then AMD can begin to target budget products. It seems to me that this is exactly what AMD is doing. Kill their Xeons first, then move down the stack. One thing about this strategy is that it moves very slowly at first and then suddenly, exponential like. If it can be done successfully, we will see the final steps shocking a lot of so called analysts.

Kind of like cutting the head off a snake.
 

moinmoin

Golden Member
Jun 1, 2017
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Amd is pursuing high margins for sure but also higher price tiers for it's products.
If they keep it rolling, soon you can see on desktop 1500$ parts from then because they will be much better than the older parts and so much more expensive.
It's Nvidia's approach applied to the consumer CPU market, offering unrivaled high end performance for... uh... pretty much unrivaled price tiers.
 

RetroZombie

Senior member
Nov 5, 2019
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It's Nvidia's approach applied to the consumer CPU market, offering unrivaled high end performance for... uh... pretty much unrivaled price tiers.
More or less the same with the difference that nvidia doesn't have 'bargain' gpus anymore, only expensive stuff and overpriced.
 

NostaSeronx

Diamond Member
Sep 18, 2011
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I have decided I'm placing this here.

Rumor: GlobalFoundries Dresden is getting pre-paid(Government funded??) EUV and potentially a module specifically for EUV.

The node will be the 7nm FDSOI node with a roadmap through 5nm and 3nm.

7LP+EUV's/5LP/3LP-Nextgen BEOL will be re-used.

My theorized roadmap:
2019 => 22FDX
2021 => 12FDX
2023 => 7FDX
2025 => 5FDX
2027 => 3FDX
2029 => Next-gen Transistor on stacked FDSOI substrates

Back to the fabrication side, Malta might be taking Dresden's mature nodes. With that Dresden will be back to leading edge R&D/Capex again.
 
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ThatBuzzkiller

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Nov 14, 2014
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Simple, GF can acquire ASML's upcoming NXE:3600 scanners and if they want to go even further in the future then they can purchase an anamorphic high-NA EUV scanner NXE:5000 once it arrives as well ...

There's theoretically not much technical hurdles for them to get to 7nm anymore since they're in a cross-licensing agreement with TSMC and if they were able to figure out 7nm with inferior 193nm immersion lithography technology, I'm pretty sure GF would be able to cut on a lot of the complexities behind 7nm if they were using mature EUV scanners ...
 

Ajay

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Jan 8, 2001
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Simple, GF can acquire ASML's upcoming NXE:3600 scanners and if they want to go even further in the future then they can purchase an anamorphic high-NA EUV scanner NXE:5000 once it arrives as well ...

There's theoretically not much technical hurdles for them to get to 7nm anymore since they're in a cross-licensing agreement with TSMC and if they were able to figure out 7nm with inferior 193nm immersion lithography technology, I'm pretty sure GF would be able to cut on a lot of the complexities behind 7nm if they were using mature EUV scanners ...
TSMC? Thought they had an X license with Samsung. Or, was that a 1 time deal?
 

NostaSeronx

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Sep 18, 2011
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TSMC? Thought they had an X license with Samsung. Or, was that a 1 time deal?
It was probably a one time deal. Pretty much everyone dodged Samsung's node for TSMC's node.

I don't think FinFETs will ever be the focus at GloFo. Simply because majority of the good FinFET employees were headhunted by Intel(Oregon or Chandler) or Samsung(Austin).
 

thor23

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Jul 13, 2019
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AMD are making 1300's and 1600's on 12nm now(rebadging zen+ technically), maybe they wont have to use 12nm for the IO die next Gen.
 

DrMrLordX

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Apr 27, 2000
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AMD are making 1300's and 1600's on 12nm now(rebadging zen+ technically), maybe they wont have to use 12nm for the IO die next Gen.
They've been doing that for awhile. Not sure how much longer they can sell those chips, though if the wafers are cheap enough, then in theory they could go on for awhile yet.
 

RetroZombie

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Nov 5, 2019
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We already know the I/O die uses more than 15 watts at GF 14nm.

We also know that renoir at 7nm with the integrated I/O die, 8 powerful cpu cores, 8 high clocked gpu units and more, only uses the exact same 15 watts.

It would be of amd best interest at least for the server market use a more power efficient I/O die done in 7nm in order to increase the amount of power available to the cpu cores and also decrease the idle power consumption that is a little higher than it should be.

That would make it's already impressive server line up even more impressive than what already is, even the lower core count server cpus would benefit a lot from this not just the high core count ones.
 

moinmoin

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Jun 1, 2017
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We also know that renoir at 7nm with the integrated I/O die
Renoir doesn't have any integrated IOD, it has a cut down limited subset of the IOD's features, it doesn't support PCIe 4 among other things. This can't be scaled up to server level since it simply doesn't contain the parts that makes the IODs separate dies, all the connectivity.
 

itsmydamnation

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Feb 6, 2011
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We already know the I/O die uses more than 15 watts at GF 14nm.

We also know that renoir at 7nm with the integrated I/O die, 8 powerful cpu cores, 8 high clocked gpu units and more, only uses the exact same 15 watts.

It would be of amd best interest at least for the server market use a more power efficient I/O die done in 7nm in order to increase the amount of power available to the cpu cores and also decrease the idle power consumption that is a little higher than it should be.

That would make it's already impressive server line up even more impressive than what already is, even the lower core count server cpus would benefit a lot from this not just the high core count ones.
im guessing still 12nm for zen3, maybe 7nm for Zen4 or maybe some SOI wafer from GF could be an option, but i would expect something other then 12nm IO die for Zen4.
 
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ThatBuzzkiller

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TSMC? Thought they had an X license with Samsung. Or, was that a 1 time deal?
It was likely a one time deal like the post after yours had pointed out. Also, even SMIC will eventually figure out 7nm through in the not too distant future as well and that's without using EUV too ... (all of their development was driven pure political will)

For GF to advance, it's all a matter of political will since TSMC settled their dispute with a cross-licensing agreement. Conditions could not be even better than they are now for investment since TSMC is forced to share their technology with GF.
 

RetroZombie

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Nov 5, 2019
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Renoir doesn't have any integrated IOD, it has a cut down limited subset of the IOD's features, it doesn't support PCIe 4 among other things. This can't be scaled up to server level since it simply doesn't contain the parts that makes the IODs separate dies, all the connectivity.
We don't know if the desktop version of renoir will have PCIe 4 enabled and is just disabled in mobile to save power or the feature is simply not there.

The server IOD is 'just' scaled 4x the desktop/mobile. It features essentially the same stuff, just in more quantity.
 

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