Originally posted by: AIWGuru
Originally posted by: Cerb
Originally posted by: AIWGuru
Originally posted by: Cerb
Originally posted by: AIWGuru
You mean 76% more (unless I missed their 500m transistor GPU somewhere...).
No...
P4northwood-55million transistors
NV40-220million transistors
That's 4 times.
Me thinks you need to go back to math class
P4 Prescott: 125m transistors.
most of which is cache. GPUs have barely any cache because of their SIMD nature. Northwood is a better indication of actually working transistors relevant to the kind of work we're talking about.
CPUs need plenty of cache to perform well, due to their nature, with all the multitasking and decision-making (not to mention bloated apps). If it's got to be apples to oranges anyway, they might as well be apples and oranges from the same season.
This GPU is the current and future graphics technology. The Prescott P4 and Hammer are the current and future CPU technology, and will likely not be replace until around the time of the next major change for graphics (not counting sockets--ugh).
Not for SIMD instructions they don't.
That's the nature of Single Instruction Multiple Data.
They only store one tiny little instruction such as filter, encode, whatever and then tons of data passes through them such as an hour of video and is instantly written back to memory without the cache being used.
Cache is more citical in operations where there is a single small piece of data which has any number of instructions executed on it (eg. SETI)
Anyway, this is irrelevant.
Take a look at what the extra SIMD instruction sets which were added to the x86 set have done for SIMD performance such as encoding (MMX, SSE, SSE2.)
Now apply that increase to a processor with more than 4 times the ammount of active working transistors designed from the ground up for this kind of work, and with 16 pipes instead of one general purpose one.
There's not really any question that this GPU should rape any general purpose CPU at encoding.