adroc_thurston
Diamond Member
Ah we were talking Zen6.
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Discussion Zen 7 speculation thread
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They got -300 Mhz.
You just need to put absolute function on it
In the MLID Zen 7 leak video, he refers to:
- FP512 - I wonder what that might be. AVX-512 equivalent synchronized with Intel
- 1/2 ACE - ACE seem to come from Advanced Matrix Extensions from AMD / Intel collaboration, and presumably, since this referred to 1/2 CCD (8 cores) it could be 1/2 of AMD's planned ACE unit.
- Tom was wondering if this can replace NPU, and I am wondering the same thing. Probably not.
- it mentions 4x FP8 performance and 2x Int8 performance. I am assuming that these will be new datatypes for AVX-512. Zen 6 is already adding 2x FP16 performance, so Zen 7 seems to be extending it further to 8xFP8. I presume this will also be part of the AVX-512 definition.
Overall, it looks to me like AMD is determined to take performance crown from Apple in client in every measure and category, including efficiency.
Similarly, in server, extend the lead absolute performance per core and also efficiency.
With full cores CCDs moving to 16 core, then full core CPU goes from 96 to 128 cores, and with 224 L3 (including V-Cache) total L3 going to 1.7 GB, and on 264 core dense to > 2 GB L3 per CPU.
- FP512 - I wonder what that might be. AVX-512 equivalent synchronized with Intel
- 1/2 ACE - ACE seem to come from Advanced Matrix Extensions from AMD / Intel collaboration, and presumably, since this referred to 1/2 CCD (8 cores) it could be 1/2 of AMD's planned ACE unit.
- Tom was wondering if this can replace NPU, and I am wondering the same thing. Probably not.
- it mentions 4x FP8 performance and 2x Int8 performance. I am assuming that these will be new datatypes for AVX-512. Zen 6 is already adding 2x FP16 performance, so Zen 7 seems to be extending it further to 8xFP8. I presume this will also be part of the AVX-512 definition.
Overall, it looks to me like AMD is determined to take performance crown from Apple in client in every measure and category, including efficiency.
Similarly, in server, extend the lead absolute performance per core and also efficiency.
With full cores CCDs moving to 16 core, then full core CPU goes from 96 to 128 cores, and with 224 L3 (including V-Cache) total L3 going to 1.7 GB, and on 264 core dense to > 2 GB L3 per CPU.
It's a lot lower than AMX and Int8 is supported with VNNI which is coming with Zen 6. I wouldn't put much stock in MLID assumption cause he can't read a spec sheet properly and 100% he would have gotten the numbers mixed up.
To his credit, expressed lowest level of confidence in it, kind of admitted he does not know what he is talking about. Questioned himself what it means.
So, if ACE is going to migrate from per core to per CPU (or CCD ore CCX), then it will be a new ballgame as far as performance. We could see anywhere from 8x to 32x performance increase of the co-processor unit vs. per core AMX.
So the question than is how that level of performance compares with NPUs on the current computers, if the NPU can be discarded this way.
As far as additional data type enhancements to AVX-512, he said usefulness of those would be in feeding AI GPUs some data in their desirable formats. Not as a substitute for Matrix manipulations, in either datacenter GPU or the ACE unit.
Can you estimate how much more performance and efficiency gains AMD needs to overtake Apple's M8?
Here's a baseline for you via Notebookcheck. M4 Pro is roughly 52% faster in Cinebench ST and 3.6x more efficient than Strix Halo.
Let's suppose M8 doubles M4 per/watt to 19pts/w. Let's suppose ST is increased by 46% over 4 generations to 260 points.
Will Zen7 increase Strix Halo efficiency by 7.2x while also increasing ST performance by 2.2x?
| Benchmark | Strix Halo 395+ | M4 Pro Mini | M4 Max | % Difference (M4 Max vs Strix Halo) |
|---|---|---|---|---|
| Memory Bandwidth | 256GB/s | 273GB/s | 546GB/s | +113.3% |
| Cinebench 2024 ST | 116.8 | 178 | 178 | +52.4% |
| Cinebench 2024 MT | 1648 | 1729 | 2069 | +25.6% |
| Geekbench ST | 2978 | 3836 | 3880 | +30.3% |
| Geekbench MT | 21269 | 22509 | 25760 | +21.1% |
| 3DMark Wildlife (GPU) | 19615 | 19345 | 37434 | +90.8% |
| GFX Bench (fps) (GPU) | 114 | 125.8 | 232 | +103.5% |
| Blender GPU Party Tug (GPU) | 55 sec | 43 sec | — | — |
| Cinebench ST Power Efficiency | 2.62 pts/W | 9.52 pts/W | — | — |
| Cinebench MT Power Efficiency | 14.7 pts/W | 20.2 pts/W | — | — |
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The biggest game changer for AMD will be inclusion of LP cores, which AMD does not have currently. That's a game changer for battery life, which most people take as a proxy of efficiency.
So, this advantage, perception of efficiency will shrink significantly.
The ST absolute scores of Mac CPUs is why they are so legendary. And why it is something of an inspiration, I bet, to all the CPU designers. It seems like AMD is gunning for those numbers. But +52% is a big gap.
The ST performance per Watt has too much noise to be of any use.
MT is a more useful measure of core efficiency, because it maximizes power usage by the cores and minimizes extraneous variables.
In that performance, M4 leads by 21-25%, which (plus future Apple gains) should be quite achievable.
In MT efficiency, M4 leads by 37% in efficiency. So, this would be more challenging, but don't forget that Apple has a node advantage now and will not have node advantage when Zen 6 and Zen 7 ship.
All of the gaps shrink just from closing the gap in the process technology used, before any new CPU design features are introduced.
Efficiency cores are one thing. I can play AAA games on my Macbook Pro on battery life and it remains cool, no fans spinning, and lasts 5-6 hours on battery. Efficiency cores play little to no role in this scenario.
Why? Numbers are right there for you.
Nope. MT efficiency is a function of how many cores (and threads) and then run them at lower clock speeds. MT efficiency is easy to achieve relatively. If AMD wants, they can beat M4 Pro in MT efficiency right now. In fact, their Epyc/Threadrypper CPUs already do probably.
Funny how you talked up highly of Zen 7's core design, then switched to using MT as the efficiency as the barometer. What?
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adroc_thurston
Diamond Member
This is not a real usecase.
That's not how it works in markets that matter (server).
It is a use case.
Exactly how it works and matters in server.
you can obviously run Strix Halo ST at lower clocks to get better perf/watt in ST/MT and comparing a N3E product to N4P product is apple to oranges comparison let Zen6/M6 launch
adroc_thurston
Diamond Member
Surely that would make Atom-based Xeons amazing.
You can't get the same perf/watt as M4 Pro but it would be like half of M4 pro
Hmm... So Strix Halo would have the ST performance of an iPhone 12 in that case. I think probably even worse given that you're decreasing power usage by 3.6x. Maybe iPhone 10 ST performance.
Are we sure @Joe NYC 's speculation about AMD's Zen7 goal is achievable given how far behind AMD is right now? It seems like AMD is about 3-4 generations behind M4. That means in order for Zen7 to beat M8, it needs to have about 8 generations of improvements in 2. Is it achievable?
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What's the link to this review? Because when I loop at the site, they only have a Strix Halo tablet for comparison. So, comparing a tablet vs. a "Pro" premium laptop vs. a Mini PC does not seem like Apples to Apples.
When I see Mini PC comparisons, the results I find are different from what you posted.
AMD Ryzen AI Max+ 395 Analysis - Strix Halo to rival Apple M4 Pro/Max with 16 Zen 5 cores and iGPU on par with RTX 4070 Laptop
The new Ryzen AI Max+ 395 is AMD's latest high-end mobile processor. With up to 16 Zen 5 cores, a powerful Radeon GPU, fast NPU and up to 128 GB RAM, the Ryzen AI Max+ is supposed to be the ideal companion for gaming, content creation, and AI development.
www.notebookcheck.net
I don't trust the power consumption for ST benchmark and I don't think it is a useful metrics.
ST performance is unconstrained by overall power limit of the chip - unless it is constrained by various BIOS settings. You don't know what they are. It can be anything. And it can be influenced by non-Core related uses of power that are not being accurately measured - much more than MT.
MT test, which is constrained to the same power limit is a much better measure of efficiency
No, you started it by raising points about it and I just answered.
Translation: AMD is so far behind in ST efficiency and performance that burying one's head in the sand is a valid option.
AMD Ryzen AI Max+ 395 Analysis - Strix Halo to rival Apple M4 Pro/Max with 16 Zen 5 cores and iGPU on par with RTX 4070 Laptop
The new Ryzen AI Max+ 395 is AMD's latest high-end mobile processor. With up to 16 Zen 5 cores, a powerful Radeon GPU, fast NPU and up to 128 GB RAM, the Ryzen AI Max+ is supposed to be the ideal companion for gaming, content creation, and AI development.
Thanks. So, it is using the Strix Halo tablet vs. MacBook Pro, and I still don't see where the Mac Mini results are coming from.
Mac Mini label was my mistake. I used this chart somewhere else. Regardless, the numbers themselves don't change.
No, set the power limit to the core (if possible) to 3W, 5W, 10W, 15W and see where the performance lands and then draw the performance / W from that.
Why just the core? Will real users experience special physics that their computer will only consume power from the core?
Let us know if you have numbers for those watts.
If the last 1% of performance was at expense of 10% of power you would not be reporting anything useful. Since you don't know where you are on the curve on either of the processors.
If there were overclocking tools for Mac and you raised your voltage limit, raised the clock, you could get to very power inefficient zone too. But Apple just prevents you from doing it.
BTW, don't limit clocks as @511 suggested, limit power. That way you are getting some useful information out of the test.
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