Question Zen 6 Speculation Thread

[Kepler_L2]

There 100% was an early EPYC BIOS image that had options for enabling 2x and 4x stacks.

I don't remember if it was Servethehome, twitter gang or this very forum i saw it in. My google-fu has failed me repeatedly in finding it but it was a quite reputable source.

https://twitter.com/x/status/1726607803610247428

 

[poke01]

No, do not do this to me... pls tell me that MDS Halo is not referring to Medusa Halo

 

[poke01]

View attachment 127241

No, do not do this to me... pls tell me that MDS Halo is not referring to Medusa Halo

You cannot end the HALO line with RDNA 3.5...

 

[DrMrLordX]

Cutting Medusa Halo doesn't make a lot of sense.

 

[LightningZ71]

I just don't think that they are getting the kind of traction that they thought they would with HALO. I think that they're going to perhaps just do a CCD swap with the Strix IOD instead.

 

[branch_suggestion]

A refresh, Z6 CCDs N2P and RDNA3.5+ on N3P with a LPDDR5X speed bump is probably enough for CES 2027 honestly knowing Intel will be covered and N2X will be pushed back due to N1X delays.
A big bump will either need moar cache through probably 3D stacking, which it seems they avoided, and/or wait for LPDDR6.
My guess for CES2028 is probably Z7/GFX14 won't be ready, I think stick with Z6 and do an enhanced GFX13.
My gut feeling is AMD has a GFX13+ halo to launch a year or so after the mainline GFX13 parts, launching soon after the PS6. Additionally this would allow an intercept between Rubin and Feynman.
RTG engineers would probably leave in some numbers if they did another RDNA4 and called it a day.

 

[Josh128]

Zen 6 is going to be named Ryzen 5/7/9 AI 10000X

That would totally break AMDs ridiculous naming schemes and cadence yet again, so yes, I agree they will probably choose to do that.

 

[poke01]

A refresh, Z6 CCDs N2P and RDNA3.5+ on N3P with a LPDDR5X speed bump is probably enough for CES 2027 honestly knowing Intel will be covered and N2X will be pushed back due to N1X delays.

RDNA3.5+ is not gonna sell in 2027. It’s clear that most of HALO is for LLMs. It’s needs be RDNA5. Framework is biggest customer for Halo.

 

[MS_AT]

Framework is biggest customer for Halo

Source? For a biggest customer, they seem to ship awfully late. I can buy HP Z2 Mini G1a already in some parts of the world, at sane prices seeing you get a SSD, a Win11 Pro license included.

 

[soresu]

You cannot end the HALO line with RDNA 3.5...

They can end it whenever they want if the sales figures for the segment aren't worth the effort.

 

[branch_suggestion]

RDNA3.5+ is not gonna sell in 2027. It’s clear that most of HALO is for LLMs. It’s needs be RDNA5. Framework is biggest customer for Halo.

The only graphics that sells itself in mobile is the green sticker.
SoCs sell largely on CPU perf and efficiency.
ML stuffs are membw bound for the most part, having the best iGPU does not beat the green sticker with higher membw.
Saving the shiny new graphics IP for when the fast new memory is ready is the right play, it allows software resources to be allocated better in the interim.
The products we want are either expensive or don't exist since the products we dream about won't actually move many units.
Medusa Halo for a big gfx bump without much faster memory needed more MALL, which basically needed SoIC, which AMD cannot be arsed designing for unless it is multi reticle Instinct or <100mm^2 Zen CCDs.
The AI bubble has killed client GPU, it will not be an interesting market until the bubble bursts and thousands of tired engineers can actually enjoy life again.
AMD will not build a halo again as the next halo will be SoIC laden, see above.
NV will continue to build near retscale dies on older processes with the same old proprietary software additions to game a handful of tech demos with bigger bars than before.
Intel is currently doing it's best USS Indianapolis impression.

There is no fun to be found in graphics for the foreseeable future, just cost cutting covered by increasingly more ML hacks.
CPUs meanwhile are quite fun.

 

[Josh128]

Cutting Medusa Halo doesn't make a lot of sense.

Makes a lot of sense. Apparently Strix Halo was a super expensive, highly specialized part that was made for high end laptops, but ended up being put mostly in Chinese or Taiwan produced mini PCs, none of which are high volume due to super high cost. Despite it being a super cool part, they probably lost money on it.

 

[gdansk]

Killing any big Radeon always makes sense. And Medusa Halo would be mainly Radeon.

 

[511]

Why is Radeon always on chopping block for big dies lmao

 

[Win2012R2]

RDNA3.5 is just not good enough, if it was 4 then that could have offset lower bandwidth nicely, but now of course it has to be 5 to succeed.

 

[ToTTenTranz]

Called it 2 months ago:

So are we calling Strix Halo a massive failure or what?

4 months into 2025, Computex is over and mobility wise we got a total of 1 design wins for a laptop and 1 for a "gaming tablet".

NUCs are where good ideas go to die out of unsuccessful B2B marketing, like Intel's GT3e and later Vega M from 12 years ago.


One (1) design win on a real (lol-priced) laptop and one on a fugly "gaming tablet" is just terrible.
AMD failed pretty hard with Strix Halo so far. And unless that changes, this means we shouldn't be so sure about Medusa Halo ever coming out.

If Strix Halo fails to move the needle in getting high end design wins for AMD, Medusa Halo will be cancelled.

Honestly, it sounds like the thing that kills Medusa Halo (and maybe the full Halo lineup) will be hubris, and not technical achievements. Just look at how bullish @adroc_thurston was about Strix Halo up to a month ago.

AMD's B2B teams thought they could just Leroy Jenkins into a new market with a giant-markup against none other than apple without starting with a value-oriented proposition. Put a large MCM with lots of CPU cores, 256bit, charge $1000 for it and see where it lands. Well it landed in 2 mobile design wins, which is devastating.




AMD can still save Strix Halo by getting it into fantastic handhelds that people are more than willing to buy, though. Decent profit-per-unit with big volume sales is a lot better than enormous profit-per-unit with nearly zero sales.

 

[QuickyDuck]

Wouldn't be surprised if it got cancelled.
It's such a commercial failure.

 

[DrMrLordX]

Makes a lot of sense. Apparently Strix Halo was a super expensive, highly specialized part that was made for high end laptops, but ended up being put mostly in Chinese or Taiwan produced mini PCs, none of which are high volume due to super high cost. Despite it being a super cool part, they probably lost money on it.

It seems to be selling pretty well in those miniPCs which are being sold for LLM/AI usage. There are tons of these things on the market. In any case, Strix Halo was never meant to be a high-volume part (that I know of) but rather a pipecleaner/test case for new interconnects/topology in Medusa.

 

[yuri69]

Cutting Medusa Halo doesn't make a lot of sense.

lol, it makes perfect sense.

Every single prior attempt to make a "large permium APU" has been canned. STX Halo making it all the way to launch is still very exceptional.

Intel, the king of x86 laptop space, failed with their Kaby-G.

AMD got no leverage in the OEM laptops space to establish a new glorious "swimlane".

When we accept the "Zen 6's pipe-cleaner" theory, it did the job. Zen 6 SKUs can use that kind of interconnect w/o any need for a Zen 6-based Halo SKU.

 

[511]

lol, it makes perfect sense.

Every single prior attempt to make a "large permium APU" has been canned. STX Halo making it all the way to launch is still very exceptional.

Intel, the king of x86 laptop space, failed with their Kaby-G.

This was Intel when it had the best fab lol but the Experiment was the most interesting APU to date nothing matches it.

AMD got no leverage in the OEM laptops space to establish a new glorious "swimlane".

When we accept the "Zen 6's pipe-cleaner" theory, it did the job. Zen 6 SKUs can use that kind of interconnect w/o any need for a Zen 6-based Halo SKU.

Well the interconnect are reused in servers/client Z6 SKU

 

[LightningZ71]

AMD stubbed their toe in two spots:

The late changes to Strix Point by removing the MALL cache and inserting the NPU/Die Waste Unit. This butchered the possible performance improvements that the enlarged iGPU could bring.
Not producing a version of Strix Halo for mobile handhelds that was optimized for their space by removing one CCD and using a cut-down or down clocked version of the iGPU in the IOD. Yes, it would be a premium part, but the handheld space already nudges into 4 figures. It could have brought volume to the platform to move the cost needle down a bit. The market needed a Z2Ultra. It would have been one of the few that would have shined while docked.

Than can still do a Zen6 version for lower cost by just carrying the IOD forward and swapping out the CCDs. It would still be a higher end product.

 

[jpiniero]

The late changes to Strix Point by removing the MALL cache and inserting the NPU/Die Waste Unit.

If anything, they should double down on the NPU if AI is going to be the point of the products. You would think it would be more die efficient than the IGP.

 

[511]

If anything, they should double down on the NPU if AI is going to be the point of the products. You would think it would be more die efficient than the IGP.

The problem is you need to maintain separate resources for software for NPU also Next gen is minimum 70 TOPS.

 

[Doug S]

The problem is you need to maintain separate resources for software for NPU also Next gen is minimum 70 TOPS.

Look at how tiny Apple's NPU is on their dies. That's I think around 35 TOPS so you'd need to double it to chase Microsoft's arbitrarily chosen minimum but that's still tiny. Even if it is a "die waste unit" at least it is only wasting a low single digit percentage of an N2 design.

 

[LightningZ71]

Balance... NPUs become VERY quickly memory bandwidth bound. Enlarging the NPU on Strix without drastically increasing dram bandwidth, as opposed to Halo, which made the NPU larger and doubled memory bus width, won't help.