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Question Zen 6 Speculation Thread

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Like i have said there is no N2P before Q2-Q3 27 as N2P HVM is H2 26 same as A16. The only advantage N2P offers vs N2 is 3% PPW that's it also it's a free upgrade forN2 designs.
 
Yeah also this time AMD is not alone for Halo SKU Nova Lake Halo exists with 2.3-2.5 more EUs vs Panther Lake based on Xe3P and full 256 bit bus width.
 
It's N2P though
Really TSMC and AMDs timeline doesn't match than for N2 as you can see N2 and N2P are a year apart.

Maybe it is due to PDK version 🤔 I remember only seeing N2P PDK for N2 Process it is possible that the PDK is same just the process is scheduled later than N2.

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Really TSMC and AMDs timeline doesn't match than for N2 as you can see N2 and N2P are a year apart.

Maybe it is due to PDK version 🤔 I remember only seeing N2P PDK for N2 Process it is possible that the PDK is same just the process is scheduled later than N2.

View attachment 123972View attachment 123974
Well AMD is calling it N2P, could be a custom variant based on N2 (like "4N" 5nm variant from NVIDIA).
 
Really TSMC and AMDs timeline doesn't match than for N2 as you can see N2 and N2P are a year apart.
TBH AMD product always get a somehow "custom" process (as every major customer does?) from TSMC. So AMD is often labeling their products using a better version than the poor vanilla one.

Don't waste your time trying understand those process name suffixes vs real products.
 
TBH AMD product always get a somehow "custom" process (as every major customer does?) from TSMC. So AMD is often labeling their products using a better version than the poor vanilla one.

Don't waste your time trying understand those process name suffixes vs real products.
Custom version of a process takes a bit of extra time 🙂
 
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They do exist
Nope.
though Intel's process are the prime example.
oh yeah that's an IDM. no can do.
There isn't unless you are referring to the PDK cause it is shared between Vanilla and N2P.
I'm referring to the actual shipped products.
NVL Halo also exists and from the specs it looks good to compete with Medusa Halo.
Intel GFX IP is doodoo.
Like they're not even in the same universe.
 
This says N2, not N2P, and its specifically EPYC CCDs. What evidence do you have that it is used on anything other than that?

View attachment 123969
EXACTLY!

There is exactly ZERO evidence that I am aware of that N2 will be used on anything other than Venice and LOTS of circumstantial evidence that AMD will NOT use the leading edge, most expensive process node for anything other than the DC parts. In fact, today they only use N3E on Turin Dense.

If anyone has any evidence at all suggesting that desktop or laptop parts will be made using N2, please post it.

You will note that there is nothing but crickets when you ask for actual evidence (with certain members that is). Expect more crickets on this one as well.

Personally, I think everyone is missing the real big deal with Zen 6. Everyone is fixated on the clock speed and the process when I am thinking that the IOD is going to be the big deal.

It is my understanding that Zen 5 was architected in a way that future designs could grow off of. I think a lower latency, higher bandwidth (and maybe a few other tricks as well) IOD might well free up a surprising amount of performance on Zen 6.

... and it may need it. Arrow Lake is SO crippled by its latency issues that simply opening up that part of the design could yield some big improvements.

Now, in DC, I think AMD is going in for the kill with Zen 6. I expect Zen 6 to be designed to move data through lots of cores with a modular IOD allowing scaling of lots of cores (Up to 4 IOD which hits the limit of 16 channels of memory on SP7 socket.
 
You will note that there is nothing but crickets when you ask for actual evidence (with certain members that is). Expect more crickets on this one as well.

Imagine you time travel ~12 months to the future, and you see that AMD client revenue soared, and is greater than AMD server CPU revenue. Big part of the client gains was AMD gaining share in the Premium segments on desktop and notebook.

At that time, it will be seen as only logical that AMD wanted to build on this, went with N2, and that the price premium from selling more premium products >> cost increment from N2.
 
Imagine you time travel ~12 months to the future, and you see that AMD client revenue soared, and is greater than AMD server CPU revenue. Big part of the client gains was AMD gaining share in the Premium segments on desktop and notebook.

At that time, it will be seen as only logical that AMD wanted to build on this, went with N2, and that the price premium from selling more premium products >> cost increment from N2.
Or it got reduced due to Panther Lake where Intel won't feel margin pressure they will have the ability to reduce prices and supplying their own silicon.
 
Or it got reduced due to Panther Lake where Intel won't feel margin pressure they will have the ability to reduce prices and supplying their own silicon.

There are still 4 quarters of Intel losing client share before Panther Lake can gain some traction (in Q2 2026).
 
Is 18A cheaper than N4?
The cost to produce 18A is similar to Intel 7 but higher margin ofc. For cost of I7 it is slightly more expensive than N4 to produce iirc can't remember the source exactly so don't hold me on that.
There are still 4 quarters of Intel losing client share before Panther Lake can gain some traction (in Q2 2026).
Make it 2.5 Quarter by Q1 26 it will be in mass availability.
PTL doesn't have the cost structure to stop AMD share gains.
Dell announcing a full AMD-based commercial stack was like the last straw before seven hells froze all over again.
It has lol bringing wafers to their own fabs can make the entire difference.
 
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