Question Zen 6 Speculation Thread

[gdansk]

Do you really think royalties amount to several thousands dollars per SoC?

No, but who said they need that? They're cheaper than they will be in the future is the point. I.e. the price pressure actually alleviates with ARM's market share growth which is the opposite of the argument given.

 

[FlameTail]

Do you really think Arm has the money to heavily subsidize hyperscalers? They might get some interesting reduction, but it's unlikely to reach the level Intel can afford.

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ARM does part of the chip engineering, which reduces cost and time-to-market for hyperscalers.

 

[yuri69]

amd is already working on zen 6 and it will be significantly faster than zen 5

Source for the faster part?

Zen 6 is an evolutionary design based on Zen 5, just like Zen 2 and Zen 4 are. AMD puts Zen 6 IPC goal to 10-15%. The frequency bump is questionable since we are already at ~6GHz. Increasing the core count from 16c is expected but the scaling of client apps is not really great.

 

[adroc_thurston]

Do you really think Arm has the money to heavily subsidize hyperscalers

That's literally what they do yes, they pay for every bit of the difficult difficult core/SoC R&D and charge hyperscalers about treefiddy for it.
But the plan was always to kick the can down the road and become a merchant Si vendor.

 

[Win2012R2]

Do you really think royalties amount to several thousands dollars per SoC?

I think right now ARM is getting on average like 7 cents per chip or something like that, but they wanted to switch to model where they get a %-tage of end chip price, not sure that worked out for them. Either way based on some pricing info from Ampere their server chips are so expensive that might as well use AMD instead without any compatibility hassles.

ARM for servers (where real money are) might only be cheap for hyperscalers who do their own cores and avoid paying Intel/AMD, but for anybody else (AKA pathetic mortals) it does not make any sense to go ARM anytime - their server chips still use same expensive TSMC process and they also want huge margin on top.

Motherboards also very expensive, RAM gone through the roof, nvmes (plus software licenses for mugs who pay per core) - all that make CPU from AMD or even Intel lesser part of the problem, which is why ARM in servers only doing well as hyperscalers, for them it's a great leverage against much higher prices from Intel/AMD, works for them and pathetic mortals end up picking the bill by paying full list prices...

 

[fastandfurious6]

Source for the faster part?

Zen 6 is an evolutionary design based on Zen 5, just like Zen 2 and Zen 4 are. AMD puts Zen 6 IPC goal to 10-15%. The frequency bump is questionable since we are already at ~6GHz. Increasing the core count from 16c is expected but the scaling of client apps is not really great.

better node, new IOD and zen5 has many kinks to iron out as brand new architecture

i.e. they now have enough time to perfect the product

did they announce 10-15% goal? imho will be higher than that

from history zen2 was significantly faster than zen1, 4800H was the 1st desktop-replacement-cpu in the market in 2kg laptops

 

[Win2012R2]

did they announce 10-15% goal?

It was in leaked slide that later appears to have been confirmed as genuine

 

[OneEng2]

Moving from N4P to N3P on desktop, Zen 6 will get some improvement in density (more transistor budget) and PPE; however, it isn't like the old days where each generation of processor had 2x the budget of the previous one.

I think we need to start getting used to smaller improvements and longer times between generations. Damn Physics!

 

[Hitman928]

It was in leaked slide that later appears to have been confirmed as genuine

Not exactly, it was listed as 10%+.

 

[igor_kavinski]

I think we need to start getting used to smaller improvements and longer times between generations. Damn Physics!

Except someone will get so bored by the lack of progress that their wandering mind will be jolted by a sudden spark of creativity and voila! A new door opens!

 

[gdansk]

I think we need to start getting used to smaller improvements and longer times between generations.

Note: This problem only applies to x64 in the near term. Apple and ARM will keep delivering decent improvements every year until they hit the power and frequency wall. Probably only a few years later but still.

 

[Win2012R2]

Not exactly, it was listed as 10%+.

Fits the range of 10-15

 

[Win2012R2]

Zen 6 will get some improvement in density

Hopefully they will fix dual branch predictor, it's possible it does not work that well due to cuts in transistor budget on 4nm

 

[Hitman928]

Fits the range of 10-15

Sure, but it also allows for it to be outside that range.

 

[Win2012R2]

Sure, but it also allows for it to be outside that range.

With greatly diminishing probability for each +1%, where as 10%+ makes it very likely to be in range of 10-15% (mid is only 12.5%), but a lot less so to be in 10-20%

Since Zen 5 underperformed (I reckon dual branch predictor not working as intended so in effect it's less wide than Zen 4) - if that's fixable and gets fixed in Zen 6 then maybe we will see better improvement than on that slide.

I'll be happy if they add Intel APX to it

 

[Hitman928]

With greatly diminishing probability for each +1%, where as 10%+ makes it very likely to be in range of 10-15% (mid is only 12.5%), but a lot less so to be in 10-20%

Since Zen 5 underperformed (I reckon dual branch predictor not working as intended so in effect it's less wide than Zen 4) - if that's fixable and gets fixed in Zen 6 then maybe we will see better improvement than on that slide.

I'll be happy if they add Intel APX to it

I agree that the highest probability lies in the 10%-15% range, I was just pointing out that the slide didn't actually state that range whereas for Zen 5, they did give that range with an upper limit, which means they're leaving it a bit more open to possibly getting higher IPC for Zen 6, even if it's not likely.

 

[Win2012R2]

I was just pointing out that the slide didn't actually state that range whereas for Zen 5

That's true.

 

[Joe NYC]

With greatly diminishing probability for each +1%, where as 10%+ makes it very likely to be in range of 10-15% (mid is only 12.5%), but a lot less so to be in 10-20%

Since Zen 5 underperformed (I reckon dual branch predictor not working as intended so in effect it's less wide than Zen 4) - if that's fixable and gets fixed in Zen 6 then maybe we will see better improvement than on that slide.

I'll be happy if they add Intel APX to it

I think the biggest issue is the dual decoder not helping in single thread - which may be a bug or an incomplete feature.

Mike Clark in one interview stated that both decoders should work in single thread (which was incorrect as far as shipping Zen 5), so maybe it is there but disabled.

You have to wonder how much this would add to single thread code...

 

[Win2012R2]

That should make dual decoders 5 or better 6-wide...

 

[Thunder 57]

I think the biggest issue is the dual decoder not helping in single thread - which may be a bug or an incomplete feature.

Mike Clark in one interview stated that both decoders should work in single thread (which was incorrect as far as shipping Zen 5), so maybe it is there but disabled.

You have to wonder how much this would add to single thread code...

Indeed. Sad to see even with Zen 5 we are limited to 4 wide which was in the original Zen unless we count SMT. That and the IOD are probably some of the biggest bottlenecks. It's great for servers but I imagine client wouldve been better off with a single 6 wide decode than what we got.

 

[Win2012R2]

On a plus side - if they do so well with 4-wide decoder and another one disabled in non-SMT mode, then imagine how much better it will be with just 5-wide decoders? Maybe primary (most likely branch) decoder should be 5-6 wide and secondary is 4-wide...

 

[Thunder 57]

On a plus side - if they do so well with 4-wide decoder and another one disabled in non-SMT mode, then imagine how much better it will be with just 5-wide decoders? Maybe primary (most likely branch) decoder should be 5-6 wide and secondary is 4-wide...

Could also be the massive uOP cache keeping the core fed without being held back by the decoders so much.

 

[Hitman928]

Could also be the massive uOP cache keeping the core fed without being held back by the decoders so much.

From the (granted limited) publicly available profiling done on Zen 5, the decoder width was seldom the bottleneck for the Zen 5 core.

 

[adroc_thurston]

From the (granted limited) publicly available profiling done on Zen 5, the decoder width was seldom the bottleneck for the Zen 5 core.

Yeah it stalls on int prf's mostly (aka the thing that saw the smallest (basically none) growth).

 

[yuri69]

I think the biggest issue is the dual decoder not helping in single thread - which may be a bug or an incomplete feature.

Mike Clark in one interview stated that both decoders should work in single thread (which was incorrect as far as shipping Zen 5), so maybe it is there but disabled.

You have to wonder how much this would add to single thread code...

As @Hitman928 stated the profiling of Zen 5 done so far had revealed the frontend bandwidth - decoders busy, uOp busy - is NOT the bottleneck. The frontend latency - a L1i cache miss, fetch after a mispredicted branch, ITLB misses, etc. - often is.

So doubling the decoder width won't help that much.

I agree that the highest probability lies in the 10%-15% range, I was just pointing out that the slide didn't actually state that range whereas for Zen 5, they did give that range with an upper limit, which means they're leaving it a bit more open to possibly getting higher IPC for Zen 6, even if it's not likely.

The slide contains marketing speak since the slide was not internal but presented under NDA. This means they definitely do not need to sandbag or anything like that.

* For the then-existing gens, they list real the marketing IPC figure.
* For Zen 5 they listed 10-15+% IPC goal
* For Zen 6 they listed 10+% IPC goal

Compare Zen 5 with Zen 6. If they knew the IPC goal would be higher than 15%, they would present it as such. Higher is better. But they did not.