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Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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itsmydamnation said:
nope, the smaller the node the less energy for the gate , but as the wire shrinks resistance skyrockets.
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That s more complex, smaller wire is not a problem as such, thing is that as distance decrease parasistic capacitance increase accordingly, two conductors have a parasistic capacitance between them that is inversely proportional to the distance, and so it goes for any surfaces that are at a different electric potentials, including the transistors themselves, the smaller the device the more the capacitance between its terminals, so even if surface decrease the smaller distance will partly compensate for the lower surfaces related capacitances.
 
HurleyBird said:
View attachment 96491
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Their predictability and consistency has actually worked so much in NV's favour.
AMD is "waste little, save all you can".
Nvidia is "waste all you need, get everything you can".

The result of those philosophies is now very visible.
Well, except for the Believers:
helppp.jpg
poke01 said:
Is AMD going to shock the PC industry in June?

Will it be bigger than Zen3/4?
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How does 40%+ IPC sound?
Make Zen 2 look like a nice equaliser with Intel, while Z5 will be the great crusher.
 

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Mahboi said:
www.tomshardware.com

AMD may have a new platform for upcoming Ryzen CPUs — AM5+ socket and Granite Ridge CPUs listed in a microcode extraction tool

AM5+ platform could come with new features.
www.tomshardware.com www.tomshardware.com
"AM5+ in 2026"
Why the heck would we be seeing a patch now then?
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Someone here said that the latest beta bios with Zen 5 support was very different to previous bioses. Sounds like AMD has reorganised the code, maybe even rewritten sections and things needs to be tested so they threw in future upcoming stuff.

Besides, the 2026 is a guess by the tomshardware writer. I suspect its much closer. FWIW, if its related to USB 4 v2, Windows 11 already have support for this.
 
Yeah also my thoughts...never heard of a BIOS patch coming 3 months before a launch that would be for the generation after!
It's probably Zen 5 enablement, but we might also get some new mobos?
 
FlameTail said:
It matters.

Every little bit does.

Like how many small streams join to make a roaring river.
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all these people who where never hear for 180 -> 130 -> 90 -> 65 -> 32 .
back then you could have the worst Uarch but if you where ahead on process generation it didn't matter. When you had both like with sandy bridge the gap was so big. imaging if intel Binned/clocked sandy SKU's like they they have with last few generations.
 
It's totally different now. The difference between N4P and N3E is less than half of a half node unless you're focusing your design on using only more logic that did scale well.

And if you do that you don't get a much faster part. You get a much more dense part that might use 15% less power or be a few % faster but not both. What good is that when the cost is negated by TSMC fees? So N3E starts with lower-clocked, dense and closer to the peak efficiency designs like Z5c.
 
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