Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[A///]

Clocks are down.

Zen2/4 were incremental and that is what you're getting with Zen6.

yes yes but not answering my question there mate.

so it's a refresh? what about this zen dense on zen normal none sense some of the kinfolk here are peddling?

 

[adroc_thurston]

so it's a refresh?

No.

what about this zen dense on zen normal none sense some of the kinfolk here are peddling?

Dense is just less clocks less area floorplan.

 

[blackangus]

Everywhere not cores and L3 and I mean that most sincerely.

I was hoping for the categories part =)
Are we getting chiplet based AI accelerators?
More Xilinix IP?
HBM?
Blah =)

 

[adroc_thurston]

Are we getting chiplet based AI accelerators?

In data center.

More Xilinix IP?

No, most of it is beyond irrelevant for CPUs.

HBM?

Beyond useless for general purpose CPUs.

 

[CakeMonster]

So L2 will increase? Given that Intel might do the same that makes sense for 'fatter' cores. I'm curious about the delta between vanilla vs X3D performance going forward if X3d L3 stays the same size...

X3d vs not (price difference is ofc relevant too) is a very interesting conundrum these days as I feel some people are exaggerating the X3D advantage given people often game in higher resolutions are at least somewhat GPU limited beyond the 1080p benchmarks that I fear too many assume are relevant for all X3D gaming...

 

[adroc_thurston]

So L2 will increase?

No.

Given that Intel might do the same that makes sense for 'fatter' cores.

What Intel does has no relation to anything AMD.

 

[Joe NYC]

yes yes but not answering my question there mate.

so it's a refresh? what about this zen dense on zen normal none sense some of the kinfolk here are peddling?

I think, looking at how the chiplets are connected in the cancelled Navi4x, this is how AMD will connect chiplets in all of their products.

Getting those GMI links routed through the substrate dirt road is becomes increasingly challenging, and also the dirt road has tolls in terms of latency, power, bandwidth.

The bridges will open (nearly) toll free highways.

On the client, the bridges will have disproportionate impact in mobile, finally allowing chiplets. IMO, Strix Halo will turn out only scratching the surface of what is to come in mobile.

 

[adroc_thurston]

this is how AMD will connect chiplets in all of their products.

no.

Strix Halo will turn out only scratching the surface of what is to come in mobile.

No it's the maximum of what you're getting in mainstream segments for a long while.

 

[A///]

No.

but you said zen 1 to ze n 2 and zend 3 to zen 4. zen 4 was considered a refresh.

Dense is just less clocks less area floorplan.

yes because I was asking if it'll be on the same package together.

 

[A///]

I think, looking at how the chiplets are connected in the cancelled Navi4x, this is how AMD will connect chiplets in all of their products.

Getting those GMI links routed through the substrate dirt road is becomes increasingly challenging, and also the dirt road has tolls in terms of latency, power, bandwidth.

The bridges will open (nearly) toll free highways.

On the client, the bridges will have disproportionate impact in mobile, finally allowing chiplets. IMO, Strix Halo will turn out only scratching the surface of what is to come in mobile.

you quote the wrong person joe?

 

[adroc_thurston]

zen 4 was considered a refresh.

No it's a new core.
Just an iterative one.

 

[A///]

No it's a new core.
Just an iterative one.

where z3 to z4 was a refresh of sorta, z6 is iterative? cache, cores, strippers?

 

[adroc_thurston]

where z3 to z4 was a refresh of sorta

It's not.
Refreshes don't give you IPC in low teens.

 

[A///]

It's not.
Refreshes don't give you IPC in low teens.

anything else you can give out about z5 and 6?

 

[inf64]

It's not.
Refreshes don't give you IPC in low teens.

I guess Zen 6 is akin to Zen 4 (~11-13% IPC?) while Zen 7 , if it even exists under that name, should be another big(ger) jump?

 

[Joe NYC]

No it's the maximum of what you're getting in mainstream segments for a long while.

It make sense to me if AMD will, in the future, aim for more commonality between high end APUs and dGPUs.

 

[A///]

It make sense to me if AMD will, in the future, aim for more commonality between high end APUs and dGPUs.

Answer the question? did you mean to quote me because you went on a wild rant about chiplets.

 

[A///]

I guess Zen 6 is akin to Zen 4 (~11-13% IPC?) while Zen 7 , if it even exists under that name, should be another big(ger) jump?

I thought zen 4 was a 19% geomean jump? is he saying the 20-25% from z4 to z5 is not a geomean jump?

 

[Joe NYC]

Answer the question? did you mean to quote me because you went on a wild rant about chiplets.

It was just my theory (rant) of Zen 6+ generations would likely bring.

 

[A///]

It was just my theory (rant) of Zen 6+ generations would likely bring.

crap yeah i missed my own question which you were responding to. you might have a point there. it was 5 months or less ago that su or someone else said amd was heavily relying on ai inferencing for routing on hardware and cleaning up what had to be by hand. the concept of computer automated routing isn't new technology but the ai part does a lot better than what you had available in the field after hand drafting went away. I haven't looked at the rdna4 canceled product i am assuming you mean mcrap's leak. i do remember someone here mentioning a separate dense die in addition to normal 1-2x dies around christmas or earlier. or the compute dies as they stnd now being increased in size to accomodate and additioning 8 cores but those being dense cores.

 

[adroc_thurston]

I guess Zen 6 is akin to Zen 4 (~11-13% IPC?) while Zen 7 , if it even exists under that name, should be another big(ger) jump?

Yes, odds are core tocks, evens are uncore tocks.

It make sense to me if AMD will, in the future, aim for more commonality between high end APUs and dGPUs.

The opposite.
dGPs share their design with server and client lives in a FOWLP ghetto.

 

[Thibsie]

For the Everything else is not - Can you give high level categories where stuff will be changing?
I think we know the interposer if changing correct?

Core will be updated here and there but cIOD and interconnect will be widely different.
This is what he's getting at.

 

[A///]

my only hope for zen 5 is it comes out before my year paid sabbatical ends so I can have some fun time with it.

 

[inf64]

I thought zen 4 was a 19% geomean jump? is he saying the 20-25% from z4 to z5 is not a geomean jump?

No, Zen 4 was between 11 and 13% geomean, depending on whether you count gaming workloads in the average or not. 19% geomean (spec 1T workload) was Zen 2 -> Zen 3.

 

[Joe NYC]

Yes, odds are core tocks, evens are uncore tocks.

The opposite.
dGPs share their design with server and client lives in a FOWLP ghetto.

Interesting. Is that what Strix Halo is using, from the graphics I/O die to the cores or are those just standard Zen5 CCDs connected with IFoP?