YAGFXT or What's the holdup in manufacturing NV30?

[Wingznut]

Originally posted by: apoppin

Originally posted by: Wingznut

Originally posted by: apoppin
So . . . won't ATI be able to take advantage of Nvidia's (& TSMC's) "mistakes" (or at least TSMC's "experience") to get to .13 micron (more quickly)?

Not really... Well sorta.

(Hope that made sense. I was trying to think of a very simple, yet somewhat realistic issue. I can think of many real-life issues, but obviously didn't want to go into those.)

Um . . . sure . . . "not really . . . Well sorta". 😛

Maybe you should try for a job with Intel marketing. 😉


😀

I'm trying to decide if I should be offended. 😛

 

[element]

Deeko, do you not realize when you've embarrassed yourself enough? Or are you as stupid as you are immature?

"µ" = Hold down Alt and type 0181 on your keypad

Hey thanks Wingznµt 😀

So Intel is going from 0.13µ to 0.09µ, what's next? 0.05µ? And how low can they go anyway? Do you see a limit size that will not be able to be exceeded?

 

[apoppin]

Originally posted by: Wingznut

Originally posted by: apoppin

Originally posted by: Wingznut

Originally posted by: apoppin
So . . . won't ATI be able to take advantage of Nvidia's (& TSMC's) "mistakes" (or at least TSMC's "experience") to get to .13 micron (more quickly)?

Not really... Well sorta.

(Hope that made sense. I was trying to think of a very simple, yet somewhat realistic issue. I can think of many real-life issues, but obviously didn't want to go into those.)

Um . . . sure . . . "not really . . . Well sorta". 😛

Maybe you should try for a job with Intel marketing. 😉


😀

I'm trying to decide if I should be offended. 😛

JUST KIDDING! 😀

I hear marketing pays really well. 😀

 

[CrazySaint]

Originally posted by: element®


To everyone else, thanks for contributing to my thread in a mature, professional manner.

Too bad you couldn't do the same.

*awaiting his postcount--*

 

[Wingznut]

Originally posted by: element®

"µ" = Hold down Alt and type 0181 on your keypad

Hey thanks Wingznµt 😀

Yoµ're welcome. 😉

Originally posted by: element®
So Intel is going from 0.13µ to 0.09µ, what's next? 0.05µ?

.065µ

Originally posted by: element®
And how low can they go anyway? Do you see a limit size that will not be able to be exceeded?

Everytime someone says there is a limit, the line gets crossed. 🙂

 

[Adul]

Exactly. There's no "universal" formula for the .13µ (or any other) process. Not only that, but AMD is using SOI, which has a longer learning curve because it tends to have more native defects. How much has that decision hurt AMD up to this point? Is SOI a significant part of the problem? Could AMD have gotten parts out sooner if they decided to go with bulk silicon? I guess all of that could be a topic of debate.

Point of correction here, AMD isn't using SOI on their current shipping .13µ parts. That is for the hammer to use.

 

[Wingznut]

Originally posted by: Adul

Exactly. There's no "universal" formula for the .13µ (or any other) process. Not only that, but AMD is using SOI, which has a longer learning curve because it tends to have more native defects. How much has that decision hurt AMD up to this point? Is SOI a significant part of the problem? Could AMD have gotten parts out sooner if they decided to go with bulk silicon? I guess all of that could be a topic of debate.

Point of correction here, AMD isn't using SOI on their current shipping .13µ parts. That is for the hammer to use.

Yeah, I know... Sorry if I implied otherwise.

 

[Adul]

Originally posted by: Wingznut

Originally posted by: Adul

Exactly. There's no "universal" formula for the .13µ (or any other) process. Not only that, but AMD is using SOI, which has a longer learning curve because it tends to have more native defects. How much has that decision hurt AMD up to this point? Is SOI a significant part of the problem? Could AMD have gotten parts out sooner if they decided to go with bulk silicon? I guess all of that could be a topic of debate.

Point of correction here, AMD isn't using SOI on their current shipping .13µ parts. That is for the hammer to use.

Yeah, I know... Sorry if I implied otherwise.

no problem 😀, just dont want others confused😕

 

[Deeko]

Originally posted by: element®
Deeko, do you not realize when you've embarrassed yourself enough? Or are you as stupid as you are immature?

"µ" = Hold down Alt and type 0181 on your keypad

Hey thanks Wingznµt 😀

So Intel is going from 0.13µ to 0.09µ, what's next? 0.05µ? And how low can they go anyway? Do you see a limit size that will not be able to be exceeded?

yea, whatever you say

 

[element]

Originally posted by: CrazySaint

Originally posted by: element®


To everyone else, thanks for contributing to my thread in a mature, professional manner.

Too bad you couldn't do the same.

*awaiting his postcount--*

I started the topic. You may now go crawl back under the rock from whence you came, since you've not added anything to the discussion either.

Dumb thread crappers.

 

[microAmp]

Originally posted by: Deeko

Originally posted by: element®

Originally posted by: JavaMomma
element®. Postcount -= 2; 😀

Deeko, Javamomma and MotoAmd:
Unlike you little limp wristed, pimple farming retards I am not concerned with my postcount. Don't you 3 kids have something better to do like run down to your local pharmacy to stock up on pimple cream or something? Be careful not to mix it up with the hemmoroid cream or you'll disappear ya little pain in the asses.

To everyone else, thanks for contributing to my thread in a mature, professional manner.

I did contribute in a mature, professional manner, until you got all whiney because I didn't use 100 words for something that required a 1 word answer.

fvcking retard.

Well said Deeko,

I was just trying to point out the # of fabs that Intel has to crank out the .13 µm parts, compared to TSMC which probably had a smaller amount.

Sheesh.... I ticked someone off by laughing at something....

 

[Deeko]

Originally posted by: element®

Originally posted by: CrazySaint

Originally posted by: element®


To everyone else, thanks for contributing to my thread in a mature, professional manner.

Too bad you couldn't do the same.

*awaiting his postcount--*

I started the topic. You may now go crawl back under the rock from whence you came, since you've not added anything to the discussion either.

Dumb thread crappers.

I'm a thread crapper? I answered your question, you wanted more details, so I gave you more details. LOL

 

[jeffrey]

There are numerous possible holdups:

1) The chip itself is an almost entirely new design!

2) .13 is a new manufacturing process for TSMC!

3) GeForceFX is 125 million transistors!

4) Nvidia is shooting for a 500mhz clock speed!

Put 1-4 together and you have a delay waiting to happen.

 

[Gstanfor]

At last the mystery is solved. I and quite a few others have been puzzled about certain aspects of NV30 - namely the external power connector and the humongous heatsink assembly, both of which came as a complete suprise.

As I posted in this thread before, NV30 was supposed to be manufactured on an advanced 13 micron process using a low K dielectric known as Black Diamond.

http://investor.cnet.com/investor/brokeragecenter/newsitem-broker/0-9910-1082-20687186-0.html?tag=ltnc

The first order of business for NVIDIA is to get NV30 off the ground. Though we picked up product specifics at the launch on Monday, we had a chance to get more detail on the timing of the ramp and remaining challenges yesterday. As expected, NVDIA has chosen not to use low-k dielectric on the NV-30, a decision which involves some performance compromises but also lowers the risk of any manufacturing miscues. With the part now qualified, waiting on system integrators to finish boards is the issue ? that clearly is not going to happen until the April quarter.

It turns out they used the ordinary 13 micron process instead. Explains a lot.

Greg