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News Windows on ARM, getting 64 bit emulation

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Does Nuvia have a physical product up for testing or are they basing their figures from where the sun don't shine?

No, but as Nuvia's founder was head architect of Apple cpu cores they have a real good reference of what kind of performance can be achieved. It's only about money, with Apple there was enough of it, with Nuvia things aren't as rosy.

But Nvidia also bet $40 billion in ARM server ecosystem, and Jensen has been pretty good on financial......
 
Does Nuvia have a physical product up for testing or are they basing their figures from where the sun don't shine?
Really? You don't know that you can get CPU performance via CPU simulation? You can basically run any code on the CPU model. It just takes more time of course. How do you think ARM optimized A78 for efficiency and X1 for high performance X1? They run simulations over night with hundreds of different configurations, 10 different sizes of ROB, 10 sizes of physical registers, 10 sizes of sheduller ques etc. You can run full factor or optimize it by hand or via optimizing SW using ie. genetic algorithm. You just need to set weights for performance, area and energy consumption. With A78 they put more weight for smaller area and efficiency while X1 has more weight for performance. Simulations and automatic optimizing is used in engineering design for 20 years.

Released Geekbench performance means Phoenix's uarch is finished or very close to it. Probably validating the core/testing against known security attacks. When main work is finished I guess Gerard Williams already started work on Phoenix2 uarch aimed for 3nm TSMC process in 2024 (time range where x86 will be practically dead due to having minority in servers).
 
Really? You don't know that you can get CPU performance via CPU simulation? You can basically run any code on the CPU model. It just takes more time of course. How do you think ARM optimized A78 for efficiency and X1 for high performance X1? They run simulations over night with hundreds of different configurations, 10 different sizes of ROB, 10 sizes of physical registers, 10 sizes of sheduller ques etc. You can run full factor or optimize it by hand or via optimizing SW using ie. genetic algorithm. You just need to set weights for performance, area and energy consumption. With A78 they put more weight for smaller area and efficiency while X1 has more weight for performance. Simulations and automatic optimizing is used in engineering design for 20 years.

Released Geekbench performance means Phoenix's uarch is finished or very close to it. Probably validating the core/testing against known security attacks. When main work is finished I guess Gerard Williams already started work on Phoenix2 uarch aimed for 3nm TSMC process in 2024 (time range where x86 will be practically dead due to having minority in servers).
I do. Done it. You're implying theres 1:1 performance, though.
 
To extend the whole issue at play a little: Oracle seems to think differently wrt what exactly law should and does protect, see
Next argument session of that case seems to be in 5 days.
The argument session took place and Google unfortunately made a huge mess of it...
 
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