You do realize that initial VIA chipsets shared a 33MHz bus for the entire south bridge and then saddled the north bridge with half the memory buffering of either an Intel 430TX or 440BX chipset. With their lousy IDE and USB implementations, slow asynchronous memory performance, unstable AGP4X, and weak memory buffering the performance was abyssmal in head to head competitions. They soon improved the buffering, solidified the AGP4X support, and added memory interleaving for the north bridge. VIA also came up with the V-link idea for the south bridge, which is up to 266Mhz, on the latest P4 chipset. The simpler initial designs were done for profitability, being that the simpler design was easier to pass through pre-production testing and to produce in mass quantity.
I'd think that the office performance marks of newer SiS and VIA chipsets would eventually catch up to Intel's IDE performance. Its a little closer in Anand's last roundup, but Intel still is king in this arena. I'm just wondering if there is a simple reason for their lead in performance.