Surprising that this isn't more widespread. I wonder how costs compare between this and traditional farming.
Surprising that this isn't more widespread. I wonder how costs compare between this and traditional farming.
Whoa. That must cost a pretty penny, even today.
Hey uh, not to take my own thread too far off-topic, but I'm a bit curious about the etching tools' depth limits. How far down can they "cut" into the base material (in this case, the silicon wafer) before producing deformities?
According to what little I know about chemical etching, a mask is applied to the material, and then a chemical is applied that eats away at any part of the material not covered by the mask. I found a DIY aluminum etching tutorial not long ago that seemed like an interesting, if sloppy take on chemical etching. Anyway, supposing the mask is only applied to the top surface of the material, etching to any depth carries with it the risk that the acid/corrosive material not only will eat away material downward but also laterally. I'm assuming this is not a big problem until you attempt to etch to a particular depth.
If you "wet etch" then the etch rates are isotropic (equal speed both downwards as well as laterally).
Etch a 1um deep hole with a wet-etch and the hole will also be at least 2um wide (1um in radius, 2um in diameter).
We use dry-etch these days which is non-isotropic for two controllable reasons. So you can etch a 1um deep hole that is maybe all of 100nm wide (50nm radius), for an aspect ratio of 10:1 (1um = 1000nm, 1000:100 = 10:1).
I walked you through that because the question you are really wanting to ask, but maybe didn't have the background or jargon to know how to ask it, is "what is the best aspect ratio one can hope to attain with modern advanced process technology capability?".
The leading edge of production-capability (can make billions and billions of them, without fail, with near 100% yield and very little variability) is approaching 100:1 AR (aspect ratio), exceeding 150:1 in only the rarest of production devices.
The most common IC that you find such immense AR holes are the buried capacitors used in DRAM.
In CMOS logic, such as your CPU, the AR is much much lower. Typically kept to no more than 2.5:1 or sometimes 3:1 because of filling issues (void formation, kills the lifetime reliability). Not a problem in DRAMs because they want the void to form for capacitance reasons.
You are truly an asset to this this forum, IDC. Thank you for the detailed explanation.
Ah ha! Thanks. That makes a great deal of sense. 150:1? That's impressive! Looks like there's some additional material on the web on the subject that makes for an interesting read.
Edward Jones Investments administrative center, in the case of a brand new Motorola fab. Sad.Around here, they become Dollar Marts.