Originally posted by: ElTorrente
Well, how MUCH voltage?
How much does temperature come into play in all of this? Does temperature not matter at all?
Does 1.7volts at 55C do more damage than 1.7volts at 40C?
The temperature and voltage are separate in this respect.
If the processor, for example a Venice was operating a load temp of 60 degrees, there would not be any thermal damage, if you are going to run the temps any higher then that you will find that the chip will get alot more unstable as temps increase, and this will cause a gradual damage of the core if those temps persist, as temperature directly effects the flow of electrons, thats why for every 10 degrees drop in temperature you can gain an increase in X amount in Mhz (cant remember the supposed value).
Does 1.7volts at 55C do more damage than 1.7volts at 40C?
in this circumstance and if this was load temperatures, then i don?t think you will see any difference in the thermal damage.
However, the damage caused by the voltage and the electrical pressure on the chip is different, this will actually damage the chips transistors and change there switching characteristics. Transistors are designed to work at certain voltages or within certain voltage/thermal parameters, and if you supply to much voltage you are then working the processor outside of its design parameters (1.7v for like a Venice = well out of spec). Of course the extra voltage = stability, but there is a point where the transistors will not respond anymore and further damage will occur, also with the increased voltage you will find that you will increase the current leakage on the processors although AMD have introduced SOI, sSOI and DSL, leakage will still occur with the excess of voltage/current being supplied especially on the die shrinks. When you decrease the size of the core (the manufacturing process i.e. 90nm over 130nm) you are looking to lower the voltage consumption not sustain the voltage consumption, the current drawn by larger transistors and higher gate lengths on the larger manufacturing process (i.e. 130nm) effectively puts a limitation to clock frequency as well, this is as a result of the power consumption and associated heat dissipation. Lowering the voltage helps reduce leakage but is increased as the die is shrunk as the interconnects are moved even closer together.
Here is some good information on leakage:
In short, leakage currents are currents that are going stray from transistors and leak into the substrate to finally be absorbed by the ground and shielding plane. As a rule of thumb, current leakage is a constant, substrate dependent factor across a given substrate. However, by changing the dielectric constant of the substrate to a lower k value, which means better insulation properties, the leakage currents can still be reduced. Still, we already started out with a low k substrate used in the Prescott as the basis for our calculation. The secret is in the distance of the different traces from each other. That is the same insulation material will provide better damming of leakage if the "wrapper" around the traces is thicker.
its basically saying that when the current travels down say like a highway/motorway the increased pressure (an Influx of cars) will actually force stray cars onto the other side of the highway/motorway (the different lanes), and with regards to the CPU, leakage can cause the changing of values for the transistors, i.e. telling the transistors (PnP and NpN) to switch incorrectly, so its value is set to on when it should be off, therefore causing incorrect operation/execution of the processor.
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