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What's with nehalem pads on top of the chip?

G

Goldfish4209

Member
On nehalem there's a couple of pads around the IHS. Based on pics I've seen, they don't seem to be making contact with any pin on the locking device. Are these the Vcc pads supplied from the locking device, or are they there just for show?
 
It's been theorized that these pins allow for Intel to "reprogram" the chip's settings and basically its ID so they can shift inventory between SKU's (920's can be re-badged as 940's if 940's inventory is running low, and vice-versa) as channel supply and demand dictate.

It seems plausible, no idea how practical such an inventory management scheme would be in reality though.

Could also be there way of calibrating the power-consumption cut-off in a test bed after the package has been lidded. (post IHS install)
 
1. Well, wouldn't that require screwing with the IHS? You'd have to lap and then re etch. Seems pretty impractical.

I don't follow.
 
I thought any multiplier-locked chip had a laser cut somewhere... kind of like a conroe-L has a core disabled by cutting through in the same manner.

I sure as hell hope your right- maybe if dual-core i3.5's (hehe) are popular enough intel will use these suspected id-mod pads/pins to software disable cores... then softmods could be used to gain access to cores. Hopefully these id interfaces run independent of the on-die processing logic- it'd suck to unwittingly enable defective cores on a chip and 'brick' a whole cpu.
 
Originally posted by: Comdrpopnfresh
I thought any multiplier-locked chip had a laser cut somewhere...
Click to expand...

ima confuse you even more... 😛

Well not right now, later tho.
 
Originally posted by: Comdrpopnfresh
I thought any multiplier-locked chip had a laser cut somewhere... kind of like a conroe-L has a core disabled by cutting through in the same manner.

I sure as hell hope your right- maybe if dual-core i3.5's (hehe) are popular enough intel will use these suspected id-mod pads/pins to software disable cores... then softmods could be used to gain access to cores. Hopefully these id interfaces run independent of the on-die processing logic- it'd suck to unwittingly enable defective cores on a chip and 'brick' a whole cpu.
Click to expand...

IIRC laser-cuts haven't been used for a while, but fuse blocks are. (pump enough current intentionally thru a specific line on the chip and it "blows" leaving a circuit open) At Texas Instruments all our fuse blockes were e-fuses, no laser cuts once we went copper at 180nm.

Regardless, fusing or laser-cut for setting multiplier is not the only way to do it, of course. A tiny bit of programmable e-flash can go a long ways for those things.
 
OHHH! like a once-programmable fpga? I think disabling cores or cache is done through laser cuts- at least on s939 A64 chips I think- venice chips were laser-cut-disabled x2's weren't they?
I bet the disabling techniques on D-P4's wasn't fuse blocked. Wouldn't the leakage on those gates possibly allow unintended fuses blowing. 'UNFORESEEN CONSEQUENCES'

would the e-flash route you mentioned lead to possible softmods to re-enable functioning units on the die?
 
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