what's an acceptable vdrrop?

[pm]

So there is no room for quality-control or better components, other than compensating? Out of curiosity.

Voltage droop is not an issue - it's part of the specification. Meaning that if the voltage did not droop under load, the board would be out of spec. It's part of the loadline specification for CPU power delivery.

As, Mondoman, pointed out above, if you download: <a target=_blank class=ftalternatingbarlinklarge href="ftp://download.intel.............698104.pdf"><a target=_blank class=ftalternatingbarlinklarge href="ftp://download.intel.com.........s/31698104.pdf"><a target=_blank class=ftalternatingbarlinklarge href="ftp://download.intel.com/de......ashts/31698104.pdf"><a target=_blank class=ftalternatingbarlinklarge href="ftp://download.intel.com/desig.../datashts/31698104.pdf"><a target=_blank class=ftalternatingbarlinklarge href="ftp://download.intel.com/design/processor/datashts/31698104.pdf">ftp://download.intel.............df</a></a></a></a></a> , and then look at page 21, figure 1 or table 6, you can see the voltage is designed to droop. This is part of the specification and for a board to ignore this, the board would be out of spec. So it's not a matter of component quality, or power supply quality, it's the manufacturers following the guidelines of the processor specificaiton. The same holds true for any other x86 CPU manufactured by Intel in the last couple of years - not just the E2000.

I briefly perused this article, and aside from the header that states I'm supposed to bow to the author, what I read matches what I know to be true and with presentations that I've attended:
http://www.xcpus.com/forums/in...ed-techrepository.html

For more technical details, look at: http://download.intel.com/desi.../applnots/31321402.pdf
and then look at section 2.2 "Socket Loadline Definitions (REQUIRED)".

 

[lopri]

I have just glanced through the white paper and it still doesn't clear a few questions that I've had. I'll take time to understand it better, but just from the table 6, it doesn't say voltages 'should' drop as VID goes up. It looks like it's saying 'allowable deviation' or 'typical', 'maximum', 'minimum' deviation. So does that mean as long as the vDroop is under the Intel specified min-max, it's OK? Is that (a huge vDroop) preferred solution or a limit that Intel sets (i.e. can't drop further) for stable CPU operation? Assuming the minimum/maximum is with power-saving features and safety in mind, does it really relate to overclocking and mannually setting voltages?

 

[pm]

For what it's worth, I attended a presentation at Intel on the subject of loadline specifications and it personally took the presenter about 20 minutes to get most of the audience of CPU design engineers (myself included) to understand why Intel does this and what the specification actually is. And I had an expert explaining it to me personally with a snazzy powerpoint slideset.

But, it does say that the voltages should drop as the current goes up. Even if you look at the minimum Vdroop, the amount is always a negative. There's a margin/deviation allowed, but it's definitely a downward path. You can see this in the figure on the page that follows it.

Vdroop is part of the power delivery specification that Intel tells it's OEM partners is required for reliable operation of the CPU. There's a margin of error, but the voltage must decrease as the current increases for the board to be in spec. As far as being on the lower or upper end of the margin of error, I would imagine that most engineers, being the prudent and cautious group of people that I'm used to dealing with, would target the middle. But if the board is aimed at overclockers, perhaps they'd skew it towards the high end.

 

[lopri]

Well, my beef is this. I will explain through an imaginary example:

Board A - Setting 1.35V in BIOS / Windows Idle 1.30V / Windows Load 1.25V
Board B - Setting 1.35V in BIOS / Windows Idle 1.35V / Windows Load 1.30V
Board C - Setting 1.35V in BIOS / Windows Idle 1.33V / Windows Load 1.30V

Board X - Has a 3-phase PWM solution
Board Y - Has a 8-phase PWM solution
Board Z - Has a digital PWM solution

With the same CPU, of course. I don't know if there is a co-relation between top 3 and bottom 3, so let's say they are mixed/matched. Can we draw some qualitative statements from the above? Or should we just accept all of them being equal as "They are supposed to do that and are within Intel specs, or within margin of errors"?

Hope my 'gripe' is described in a clearer fashion.

 

[Idontcare]

Originally posted by: Rubycon
Vdroop is inevitable given the current draw. One cannot twist the immutable laws of physics. The boards that have less are compensating. My P5E-WS actually shows an increase of VCORE with increasing load. (this feature can be toggled in the BIOS).

It is true, unless you have superconductor material for the wires (no this is not a quip, this is the physics).

The most straight-forward reason is Voltage drops from resistance, and resistance increases as a function of current because the temperature of the conductor increases as a function of power dissipation which is a function of current.

This is precisely how incandescent light-bulbs work by the way.

So the only way to avoid voltage drop when current increases is to have a superconductor where the resistance to current is defined to be zero, thus no ohmic heating.

Also many people might be surprised to know the 120V AC that runs thru your house is allowed by spec to drop as much as 10V (varies by state) when you place a load on the circuit. The decrease in voltage is the same phenomenon, the wires in the walls will heat up ever so slightly (allowed) and the increase in resistance will decrease the delivered voltage at the wall outlet.

I had a house in Texas that was poorly wired the the Vdroop at the receptacle was nearly 15V, an electrician had to come in and rewire to get it back to spec.

 

[Markfw]

lopri, I agree, vdroop on quads at least, is bad. The only way I could escape it, was my DQ6.

 

[lopri]

Bump to see if I can get an answer to my question above.

 

[Idontcare]

Originally posted by: lopri
Well, my beef is this. I will explain through an imaginary example:

Board A - Setting 1.35V in BIOS / Windows Idle 1.30V / Windows Load 1.25V
Board B - Setting 1.35V in BIOS / Windows Idle 1.35V / Windows Load 1.30V
Board C - Setting 1.35V in BIOS / Windows Idle 1.33V / Windows Load 1.30V

Board X - Has a 3-phase PWM solution
Board Y - Has a 8-phase PWM solution
Board Z - Has a digital PWM solution

With the same CPU, of course. I don't know if there is a co-relation between top 3 and bottom 3, so let's say they are mixed/matched. Can we draw some qualitative statements from the above? Or should we just accept all of them being equal as "They are supposed to do that and are within Intel specs, or within margin of errors"?

Hope my 'gripe' is described in a clearer fashion.

With such fairly minor differences between the reported voltages across these boards I would be suspicious of whether you are getting accurate enough readings from the software measurements to support any conclusions.

Were the Vcore numbers hardware measured/reported (like they insist you do on XS forums) then we could be confident that further analysis and discussion would be fruitful.

 

[lopri]

Arggh! Of course we're assuming the accuracy of measurement. In the end it's common to see different voltage drop/fluctuation with different board, when measured with a DMM.

If we cannot draw any qualitative statement from the different ways boards dealing with vCore - What is the basis for a company advertising "8-phase PWM" as a superior means for power delivery? How about digital PWM - is it supposed to be better, when built right in theory?

And of course the question of the top 3 boards still remains..

 

[Rubycon]

No PWM design can make up for voltage drop across a conductor. Smarter designs using feedback can increase values under load to counter the drop. These settings can overcompensate and actually cause levels to run slightly higher under load. This is basic regulation. The biggest enemy is heat and there's not a lot of room to put in massive heatsinks to remove it either. When your CPU is pulling well over 100 amperes you're going to have regulate!

 

[Idontcare]

Originally posted by: lopri
Arggh! Of course we're assuming the accuracy of measurement. In the end it's common to see different voltage drop/fluctuation with different board, when measured with a DMM.

If we cannot draw any qualitative statement from the different ways boards dealing with vCore - What is the basis for a company advertising "8-phase PWM" as a superior means for power delivery? How about digital PWM - is it supposed to be better, when built right in theory?

And of course the question of the top 3 boards still remains..

My bad Lopri, I just got the fact we are talking hypotheticals here. Yeesh I feel like an idiot, somehow I read your post not once, not twice, but three times and even then I still thought you were talking about your hands-on experience with three mobo's and one CPU.

Ugh. OK in this case I will say I have no clue how each board should in theory be considered superior or inferior relative to the other. My electrical engineering stopped short at the year-2 college level. Enough to talk circuits, registers, and the like but not enough to adequately contemplate the intricacies of modern power routing and design.

 

[aigomorla]

Originally posted by: n7


I'm trying to find a P35/X38 that suits my needs, but thus far, i've realized no such board exists :frown:

im only recomending this board to you because i think you cna handle it.

It has around 40 different overclocking options. The vdroop is incredibly small, and it the highest fsb i was able to clock a E8400 on it was an amazing 553FSB.

DFI LT X38-T2R

I want to drop a yorkie on it, but im still debating on what platform to go with on my next build. I have both boards:

EVGA 780i [currently sent out to a custom builder to put the entire board under water, not taking ANY chances with stress on this one] Entire meaning mosfet, northbridge, pci-e 2.0, South bridge.

DFI X38-T2R [Wolfdale i've been messing with it on this board]

The eVGA would allow G92. However im hearing good things about future ATI products expecially now since they have a high quality fab.

The DFI i'd probably go HD3780X2 single, until quadfire was resolved.



But definitely look for a PCI-E 2.0 solution. Nvidia's next gen cards should be interesting so i guess i ultimately wait for that.

 

[VirtualLarry]

Originally posted by: Rubycon
The biggest enemy is heat and there's not a lot of room to put in massive heatsinks to remove it either. When your CPU is pulling well over 100 amperes you're going to have regulate!

That's why, IMHO, that more power phases are better, because the individual load (and temps) on each phase will be lower. Lower temps == better longevity. This is the case with the P35-DQ6. It's also the reason why I don't like the new dynamic energy saver technology in Gigabyte's new EP35 boards. I would rather "waste" the slight difference in power, running MORE phases constantly (but at lower loads individually), than save a tiny trickle of power, but overtax (in the long term) a smaller number of active power phases.

 

[LOUISSSSS]

hows my vdroop compare with the rest guys?

CPU: Q6600 @ 3.58ghz, MB: DS3P
Bios: 1.35
CPU-Z Idle: 3.12
CPU-Z P95 SmallFFT: 1.28