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What you need to know about Nehalem

Winterpool

Senior member
ArsTechnica's 'Hannibal' has always been my favourite writer on cpu architectures, ever since Apple's PowerPC days. I didn't read Computer Science or Electrical Engineering at university, so I very much appreciate a tech writer whose education has ranged beyond those disciplines (Stokes is doing a PhD in Ancient History at Chicago).

What you need to know about Intel's Nehalem CPU

It all sounds quite exciting and new. Which is why I'm buying Penryn now and don't expect to find myself building a Nehalem system before 2010 (late 2009 at earliest).
 
I say "back to the future" because ISA-level support for string processing is a hallmark of CISC architectures that was actively deprecated in the post-RISC years; typically, when a writer wants to give an example of crufty old corners of the x86 ISA that have caused pain for chip architects, string manipulation instructions are what he or she reaches for. But the new SSE 4.2 string instructions are aimed at accelerating XML processing, which makes them Web-friendly and therefore modern (i.e., not crufty).

Oh. My. God. This could be *HUGE* for the app server/web server crowd. The reason old mainframes supported so many users so well is they had precisely this -- very strong string primitives implemented in silicon. Coupled with sewerpipe like memory bandwidth and...

I want it, and I want it now.
 
Originally posted by: Penth
I didn't see price and availability date. That's what I need to know!

Ask AMD, Nehalem availability and pricing (for desktop parts Bloomfield and Havendale) will no doubt highly depend on Shanghai's desktop (codename Deneb) performance, pricing, and volume ship date.
 
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