What makes the Palomino able to hit higher clock speeds compared to the Thunderbird?

Quad

Golden Member
Nov 18, 2000
1,222
0
0
what are the major factors in the palomino architecture that enable it to hit clockspeeds that the tbird couldn't? same thing with overall performance.

both of them are 0.18-micron correct?

thx in advance :)
 

Evadman

Administrator Emeritus<br>Elite Member
Feb 18, 2001
30,990
5
81
The packaging was one. The ceramic was holding the Athlon back.
 

overdoze

Member
Aug 16, 2000
132
0
0
They are both 0.18um
Palomino has better design, better timming, better floorplan, lower power consumption, less heat
As you will see in the future the Barton will be better than the Tbred. Newer product has got to be better than older product. A really old rule of thumb ain't it?
 

Howard

Lifer
Oct 14, 1999
47,982
11
81


<< Newer product has got to be better than older product. A really old rule of thumb ain't it? >>


*cough*
 

Howard

Lifer
Oct 14, 1999
47,982
11
81


<< Newer product has got to be better than older product. A really old rule of thumb ain't it? >>


*cough*
 

Quad

Golden Member
Nov 18, 2000
1,222
0
0
overdoze thanks :)

but what specifically about the design makes it better? what are the major aspects of the architecture that allow it to operate at faster speeds?

thanks in advance
 

overdoze

Member
Aug 16, 2000
132
0
0
yucky, you are double posting, and I have yet to hear your discussion instead of just "cough". Let's make it a real forum

Quad, there are no architecture differences between palomino and thunderbird except a little enhancement that you can find on AMD website. It is a real long story to explain everthing in depth. Any design has flaws and bugs. By saying bugs it is not necessary cause any harm to end users but rather bugs that is okay to run at lower clock speed but would not run at spec speed. Basicly, AMD has gone thru design optimization. AMD has not perfecting the thunderbird design before releasing it. Just as I mention before, better timing, better floorplan which shorten the electrical path inside the core which in turn reducing the load. By reducing the load which cause it to reduce the heat, and by reducing the total power consumption on the cpu allows it to run at faster speed. Anyone add to this?

Of course, there is a limit in what you can do in a certain process (0.18um). By shrinking it to 0.13 everything get smaller which truely increase the speed quite a bit more.
 

ST4RCUTTER

Platinum Member
Feb 13, 2001
2,841
0
0
Like overdoze was saying, basically the CPU has just been optimized. Here is a snipet from Anandtech's excellent review of the Palomino at introduction.

"The Athlon (Thunderbird) core had 37 million transistors of various types, but it was AMD's first shot at an Athlon core with an on-die L2 cache. The Athlon 4 takes the same Thunderbird core and further optimizes the core by using more optimized transistors for various portions of the core. When you are dealing with the 37.5 million transistors that make up the Athlon 4, such optimizations can result in quite a bit of power savings. According to AMD, these improvements to the Athlon 4 result in a 20% decrease in power use compared to an equivalently clocked Athlon using the Thunderbird core. The die size hasn't changed much either; a small increase from 120 mm^2 to 128 mm^2.

Part of this optimization process included a change in layout of the core which is why the Athlon 4 core does in fact look different than the older Athlon (Thunderbird) core. The change wasn't cosmetic; it was for further performance and power optimizations.


So in a nutshell, AMD improved the efficiency of the core and actually enlarged the die which increases the heat dissipation of the die keeping the CPU running cooler than an equally clocked Thunderbird core.

 

pm

Elite Member Mobile Devices
Jan 25, 2000
7,419
22
81
Essentially what was most likely done was what I normally hear termed a "compaction". You take an existing design and re-floorplan it out so that it works better. Once a chip is done, it's fairly easy to see the many things that you could have done better. A compaction allows you to do this. You improve power by fixing the circuitry, improve reliability/manufacturability/quality, fix problems and improve the critical paths that limit the chip. Another advantage of a compaction is that often you can take better advantage of new process technologies - like moving a design from a 5 metal 0.25um process to a 6 metal 0.18um process, a compaction would allow you to make better use of the new metal layer. There are other, more esoteric, reasons why it can help improve density when porting to a new process as well.

An example of a compaction based on my experience: P54CS (my first project with Intel, the 133-200MHz Pentium) was a compaction of P54CQS (120-133MHz Pentium). The process technology was the same, 0.35um, but the die size was substantially smaller (483x525mils for CQS, 361x392mils for CS), and, of course, the P54CS was clearly able to be clocked substantially higher. Basically we just tweaked what was already there and moved things around a bit to make them work better - it's always easier to improve something that's working than optimize it while you are trying to make sure that it works.

Patrick Mahoney
Microprocessor Design Engineer
Intel Corp.
 

rimshaker

Senior member
Dec 7, 2001
722
0
0
Well, I was gonna post until i saw that pm was already here :)

Don't forget that copper interconnects were also incorporated in the Palomino core.

pm, still trying to get hired at Intel. I have contacts already, but the entire process is sooooo slow... :(