Essentially what was most likely done was what I normally hear termed a "compaction". You take an existing design and re-floorplan it out so that it works better. Once a chip is done, it's fairly easy to see the many things that you could have done better. A compaction allows you to do this. You improve power by fixing the circuitry, improve reliability/manufacturability/quality, fix problems and improve the critical paths that limit the chip. Another advantage of a compaction is that often you can take better advantage of new process technologies - like moving a design from a 5 metal 0.25um process to a 6 metal 0.18um process, a compaction would allow you to make better use of the new metal layer. There are other, more esoteric, reasons why it can help improve density when porting to a new process as well.
An example of a compaction based on my experience: P54CS (my first project with Intel, the 133-200MHz Pentium) was a compaction of P54CQS (120-133MHz Pentium). The process technology was the same, 0.35um, but the die size was substantially smaller (483x525mils for CQS, 361x392mils for CS), and, of course, the P54CS was clearly able to be clocked substantially higher. Basically we just tweaked what was already there and moved things around a bit to make them work better - it's always easier to improve something that's working than optimize it while you are trying to make sure that it works.
Patrick Mahoney
Microprocessor Design Engineer
Intel Corp.