What is the rationale behind integrating the voltage regulator in Haswell?

[2is]

Overclocking will take a hit most likely.

AMD, please get competitive again. Dreams away....

I'm glad someone said this, because every time intel makes a change, this argument is brought up and every time the chip is an exceptional overclocker.

 

[Ben90]

I'm still mad they integrated the cache. It's obviously a scam for more profits.

 

[jpiniero]

I'm glad someone said this, because every time intel makes a change, this argument is brought up and every time the chip is an exceptional overclocker.

Except now Intel is hitting heat density limits. There's only so hot you can let a processor get, even "within specification". I'm not saying this is the end of overclocking, but don't be surprised if Broadwell can't hit 4 Ghz.

 

[Homeles]

Except now Intel is hitting heat density limits. There's only so hot you can let a processor get, even "within specification". I'm not saying this is the end of overclocking, but don't be surprised if Broadwell can't hit 4 Ghz.

This is ridiculous fear mongering at best.

 

[2is]

Except now Intel is hitting heat density limits. There's only so hot you can let a processor get, even "within specification". I'm not saying this is the end of overclocking, but don't be surprised if Broadwell can't hit 4 Ghz.

I'll be surprised if Broadwell doesn't hit 4GHz+ at it's stock turbo settings.

 

[ShintaiDK]

Except now Intel is hitting heat density limits. There's only so hot you can let a processor get, even "within specification". I'm not saying this is the end of overclocking, but don't be surprised if Broadwell can't hit 4 Ghz.

They hit those since the P4. Went quite well since dont you think?

 

[jpiniero]

They hit those since the P4. Went quite well since dont you think?

It is pretty similar to the P4 situation. They may not be as motivated to deliver a brand new architecture as they were back in 2006 though; Intel seems content to add cores for servers and mobile won't hit the limits for awhile now.

 

[ShintaiDK]

It is pretty similar to the P4 situation. They may not be as motivated to deliver a brand new architecture as they were back in 2006 though; Intel seems content to add cores for servers and mobile won't hit the limits for awhile now.

Let me guess, you base your entire claim on IB runs hotter than SB?

My stock 3570K runs cooler than my i7 860. And the stock cooler on the 3570K is smaller as well. Not to mention one site hit 5Ghz on air with IB.

Longer back you would also see E6xxx running alot cooler than E4xxx. Now go figure out why

So to me it seems the attention span is limited to late SB vs early IB only.

 

[Hugo Drax]

In the future Motherboards wont exist. You buy a module that has it all and would look similar to this. Videocards wont even exist. You want more you throw out the old module and swap out.

 

[Homeles]

In the future Motherboards wont exist. You buy a module that has it all and would look similar to this. Videocards wont even exist. You want more you throw out the old module and swap out.

The future is thousands dollars of processed silicon on the same package?

 

[jpiniero]

Let me guess, you base your entire claim on IB runs hotter than SB?

Intel did raise the max allowable processor temp. It's almost as if they had to cut the headroom they would normally give in order to be able to sell Ivy at similar clock speeds as Sandy. Shink it again, and add in the VRM and chipset and you can see where this is headed.

 

[ShintaiDK]

Intel did raise the max allowable processor temp. It's almost as if they had to cut the headroom they would normally give in order to be able to sell Ivy at similar clock speeds as Sandy. Shink it again, and add in the VRM and chipset and you can see where this is headed.

Check Tjmax from 65nm Core 2 to 45nm. Then 45nm Nehalem to 32nm Westmere.

I bet you see a pattern.

 

[Abwx]

presumably some implementation of these: http://www.sparkfun.com/datasheets/Components/FAN1117A.pdf

This is a linear serie regulator , the ones that have awfull losses ,
often 40 % of the power consumed by the device they are supplying ,
that would translate to 40W for a 100W TDP CPU.

Instead , PC PSUs and motherboards regulators use switched mode
power supplies that can have as much as 90%/95% efficency , reducing
losses to 5W to 10W for a 100W CPU PSU.

Although integrating the logic control and command circuit
or even the power mosfets would be possible , the filtering
capacitors and inductances cant be integrated.

http://cktse.eie.polyu.edu.hk/NSR/presentation/SMPS-lecture-1.pdf

 

[Nemesis 1]

Except now Intel is hitting heat density limits. There's only so hot you can let a processor get, even "within specification". I'm not saying this is the end of overclocking, but don't be surprised if Broadwell can't hit 4 Ghz.

NO no NO . SB was designed for the 32nm . Go back compare intels 1st 32nm chip . than compare it to SB. Haswell is the first intel chip designed for 22nm . It makes a differance . on haswell o/c ing we will have to wait and see intel says it be a good O/cer

 

[Abwx]

Haswell is the first intel chip designed for 22nm .

There is 32nm IBs ??.....

 

[Homeles]

There is 32nm IBs ??.....

You really think Ivy Bridge features all the possible optimizations for 22nm and FinFETs?

 

[Cookie Monster]

I get the feeling that Intel is trying to create two power converter stages instead of one which is what we have now. So by introducing this 2nd stage, where essentially its 12V->xV (1st Stage), then xV->1.1V (2nd Stage) power users will literally have zero control over the voltages supplied to the chip..

Im thinking that the inductor/chokes + filtering capacitors could be an external requirement set out by intel and the mosfet/controller is integrated into the CPU, just like how all regulator ICs work.

 

[cbn]

In the future Motherboards wont exist. You buy a module that has it all and would look similar to this. Videocards wont even exist. You want more you throw out the old module and swap out.

That is an interesting concept....the ability to swap out modules.

P.S. It also makes sense (to me) Intel would proceed down some type of road like that. After all, the name "Intel" is an abbreviation for "Integrated Electronics".

 

[ShintaiDK]

That pic is an old POWER4 module. Seperate L3 cache etc.

But else yes, its only a matter of time before you buy a tiny mobo with a SoC with everything.

Next step is VRM, then chipset, then...memory? Memory would be a huge step performance wise for iGPUs. But after Skylake only memory and storage is left.

 

[Abwx]

You really think Ivy Bridge features all the possible optimizations for 22nm and FinFETs?

Of course , otherwise they wouldnt have launched it...

Indeed , a 32nm IB would be 50% bigger than SB ,
so it s not the same CPUs , not a simple die shrink.

Haswell will benefit from mature process , though ,
better yields and improved parameters of the fets.

 

[2is]

I get the feeling that Intel is trying to create two power converter stages instead of one which is what we have now. So by introducing this 2nd stage, where essentially its 12V->xV (1st Stage), then xV->1.1V (2nd Stage) power users will literally have zero control over the voltages supplied to the chip..

Im thinking that the inductor/chokes + filtering capacitors could be an external requirement set out by intel and the mosfet/controller is integrated into the CPU, just like how all regulator ICs work.

I don't feel that at all. Intel could have killed off "power users" long ago by simply not releasing K series processors.

 

[Khato]

Im thinking that the inductor/chokes + filtering capacitors could be an external requirement set out by intel and the mosfet/controller is integrated into the CPU, just like how all regulator ICs work.

Thing is, the reason for needing such beefy VRMs is the combination of the distance to and current volatility of a CPU load. When you have to design a regulator that can go from 1A to 80A in a tiny fraction of a second to a load around 1.5" away through motherboard traces/socket there's no choice but to have a design like we say today.

However, soon as you decide to deliver high voltage to the core a number of new options become available... primarily the interesting possibility of distributed voltage regulation. With power transistors, size is basically proportional to the amount of power it has to handle, there's not a whole lot of overhead. The result being that the difference in die size necessary for a single 80A regulator isn't that much different from 80 1A regulators... it actually ends up being far less to use many small regulators properly distributed throughout the design due to the fact that a single large regulator would suffer from the same issues as current VRMs, just on a lesser scale. So goes the theory at least.

 

[Homeles]

Of course , otherwise they wouldnt have launched it...

Indeed , a 32nm IB would be 50% bigger than SB ,
so it s not the same CPUs , not a simple die shrink.

Haswell will benefit from mature process , though ,
better yields and improved parameters of the fets.

If that were true, there'd never be a point in new steppings like Phenom II's C3. It's highly probably that both the Haswell design and the 22nm process itself will be tweaked outside of simple maturity to a better state than they were with Ivy Bridge's launch.

 

[2is]

Of course , otherwise they wouldnt have launched it...

Indeed , a 32nm IB would be 50% bigger than SB ,
so it s not the same CPUs , not a simple die shrink.

Haswell will benefit from mature process , though ,
better yields and improved parameters of the fets.

A contradiction isn't it? If IB is as optomized as it can be then there's no such thing as a "mature process" it'll be identical. If its already as good as it can get a mature process only means an old process and nothing more.

 

[Abwx]

A stepping is a slight redesign of the CPU , where some parts
are optimized to reduce their TDP, increase their speed , in short
to make the real world product stick as much as possible with
the simulations.