What is the cost of fabs and R&D at 22-nm?

[Idontcare]

What is the cost of fabs and R&D at 22-nm?

The stakes are indeed huge. The R&D costs for process technology are expected to climb from $310-to-$400 million for the 90- to 65-nm nodes, to $600-to-$900 million for the 45- to 32-nm nodes, to $1.3 billion for the 22- to 12-nm nodes, he said.

A fab is expected to run from $2.5-to-$3.5 billion for the 90- to 65-nm nodes, to $3.5-to-$4 billion for the 45- to 32-nm nodes, to $4.5-to-$6 billion for the 22- to 12-nm nodes.

http://www.eetimes.com/news/se...l;?articleID=220300791

Some newer numbers for you folks that like to talk money.

$1.3B for 22-12nm node development plust $4.5B-$6B for the production fab.

With these kinds of economics coming our way it really begs the question will 450mm wafers ever see the production environment?

 

[ilkhan]

I expect the equipment for 450mm wafers costs significantly more, but don't you get like 2.25x the surface area to work with? Seems like Intel/et-al would be wanting the bigger surface as soon as possible.

 

[drizek]

Ya, I had read that chip makers wanted 450mm wafers but equipment manufacturers were reluctant to develop the machines for them.

 

[TuxDave]

This was the motivation for my thesis. To study and design a maskless lithography system using an array of MEMs micromirrors. It was definitely interesting but we didn't get much funding and interest to finish the prototype to completion.

 

[MODEL3]

Yeah, i knew about those numbers from Anand Globalfoundries article in july.

http://images.anandtech.com/re...oundBreaking/costs.jpg

http://images.anandtech.com/re...oundBreaking/costs.jpg

http://www.anandtech.com/cpuch...ts/showdoc.aspx?i=3614

I posted about them back then.

About 450mm wafers:

http://www.physorg.com/news129301282.html (Intel, TSMC and Samsung camp)

Intel Corp., Samsung Electronics and TSMC today announced they have reached agreement on the need for industry-wide collaboration to target a transition to larger, 450mm-sized wafers starting in 2012. The transition to larger wafers will enable continued growth of the semiconductor industry and helps maintain a reasonable cost structure for future integrated circuit manufacturing and applications

and the opossite camp (Global Foundries, IBM, SMIC, UMC and Chartered, etc...)

http://www.theinquirer.net/inq...-distraction-fab-execs

The economic downturn seems to have polarised chipmakers over 450-mm wafer production, with Intel, TSMC and Samsung advocating the migration as a way to innovate out of the crisis, whilst the other big fab firms - including Global Foundries, IBM, SMIC, UMC and Chartered - say the enormous R&D costs involved are just not worth the investment , or the bother, at the moment

 

[tommo123]

i wonder how long till there's only 2 players left? intel vs everyone else?

 

[IntelUser2000]

The numbers are that it costs $1 billion just to get 450mm wafers going. So add that to everything in the 22nm development.

Some predict that Intel will eventually make their own lithography machines and will be in top 10. Maybe it makes sense. Do everything by yourself!

 

[Idontcare]

Originally posted by: IntelUser2000
The numbers are that it costs $1 billion just to get 450mm wafers going. So add that to everything in the 22nm development.

Some predict that Intel will eventually make their own lithography machines and will be in top 10. Maybe it makes sense. Do everything by yourself!

That would be an industry coming full-circle then, we started out making our own equipment and quite a few players in the tool industry resulted from spin-offs of those early in-house programs.

FSI for example, a wet cleans and lithography coater vendor, was a TI spin-off. There were many others.

So we go from vertical to divested and then back to vertical. It may be the most effective way to do it on the timeline they are on.

 

[Idontcare]

Originally posted by: ilkhan
I expect the equipment for 450mm wafers costs significantly more, but don't you get like 2.25x the surface area to work with? Seems like Intel/et-al would be wanting the bigger surface as soon as possible.

Yeah, at the high-level financial viewpoint it is very much analogous to that of new technology nodes. Larger wafers enables the opportunity to eventually make your chips for less on a per-chip basis, but the cost of doing everything (from running the fab, to maintaining the equipment, to developing the processes for the tools, to the wafers, to cycle-time and throughput, etc) rises considerably.

So just as developing an new node requires a healthy 4 year investment with little return until the very end, and then you pay more per wafer (about 20%) to use the new process tech to make your chips, and you have to pay a ton of money to upgrade your production line to implement the new process tech (Intel's $7B for 32nm)...and only then do you get to start shipping chips for revenue to pay-off four years worth of bills. And not everyone is large enough (revenue-wise) to pony up the minimum entrance fee to play this game - this is generically referred to as "the barrier to entry" across every industry.

You have a similar R&D + implementation life cycle and cost cycle of wafer-size increments. The issue with 450mm wafer adoption and implementation is not the magnitude of the potential benefits, but rather the barrier to entry from the cost standpoint.

Barrier to entry determines market size, and market size determines the boundary condition on ROI that the toolmakers can convince themselves they might extract from their efforts to develop 450mm toolsets. That investment vs ROI delta is something the decision makers at the toolmakers must use as their justification to BOD and shareholders for spending shareholder money today in the pursuit of something that can't be sold until a much later date and even then to a rather small pool of potential customers.

This isn't a chicken-vs-egg thing, simply building 450mm equipment does not mean the customers will then come. The tools, their maintenance, the fabspace needed to house them, the development of even lower within-wafer variability processes, etc, will put them out of reach of a large percentage of the existing 300mm customer space. The same thing that happens to customers like TI and STmicro who eventually get to the point where they can't justify spending the money needed to surmount the barrier to entry.

I worked with toolmakers in developing some of their 300mm toolsets, as well as the early beginnings of some 450mm tools, the mentality and impediments to the transition to 450mm is markedly different from those of the transition to 300mm. In many ways the 450mm vs 300/200/150/etc situation is similar to that of EUV versus the prior litho node 193i/193/248/365 milestones where the cost structure and marketsize was easily defined and barrier to entry was viewed as manageable by the existing customer base...450mm and EUV, not so much, this time it really is different because the economics have outpaced the market growth itself.

 

[Idontcare]

Originally posted by: TuxDave
This was the motivation for my thesis. To study and design a maskless lithography system using an array of MEMs micromirrors. It was definitely interesting but we didn't get much funding and interest to finish the prototype to completion.

I remember some of our DLP guys talking about this subject in one of their "where can we go with DLP" discussions over lunch. You'd be far more knowledgeable on the details of the care-abouts (and their potential solutions) but what stuck with me from those conversations is that you'd need an analog control system for the mirrors versus the digital/binary tilt angle (tilted one way or the other, but no intermediate "tilt angles") offered by the technology as implemented at that time.

The gist of it, if I even got the gist correctly, was that it was plausible as a low-cost replacement of low-resolution litho apps (say a new startup line for 250nm analog and such) but the technology wouldn't be able to compete with capability of high resolution solutions like EUV. I'm not stating any of this as fact, I was not qualified to claim to understand their discussion fully, nor do I really know whether they were qualified to actually discuss the merits with any degree of authority.

You can tell me if these concerns were/are relevant or if they were misplaced/misguided.

 

[Idontcare]

Originally posted by: tommo123
i wonder how long till there's only 2 players left? intel vs everyone else?

Which chip makers will rule in 2018?

In 1978, Texas Instruments Inc. and Motorola Inc. were the top two chip companies, followed by NEC Corp. and Hitachi Ltd.. In 1988, Japanese companies occupied the top 3 spots. Ten years later, Intel Corp. was No. 1, where it remains today. (See chart below)

Which companies will be in the top 10 in 2018? Not a startup or a broadline supplier, according to an analyst.

''I think it is safe to say Intel and Samsung will be there,'' said Bill Jewell, principal of Semiconductor Intelligence LLC (Dallas), a research firm.

''A few other current top 10 companies should make the list, although some of them could be in other forms due to mergers or other combinations. A few new companies should make the top 10 by 2018 from the ranks of today's number 11 to 50,'' he said.

''Could a new company not ranked today be in the top 10 by 2018? Not likely; even though companies in this industry can grow quickly, it would be extremely difficult for a company in less than ten years to go from startup to the $10 billion or so in revenue required to make the top 10 in 2018,'' he said.

http://www.eetimes.com/news/se...l;?articleID=220300621

 

[Phynaz]

It will be interesting to see if process technologies get licensed. You could theoretically have a company whose sole purpose is to design manufacturing technologies and then get paid a per wafer royalty for the process.

Seems like it would be more efficient than all these companies spending billions on their own.

 

[Idontcare]

In a very real sense of the term that is what IBM does, and has done for quite a while.

For example CMP was licensed from IBM by many IDM's in the mid nineties.

And now with the IBM fabclub the development costs are divied up in a contract that also incorporates elements of IP licensing for folks that are cash-poor now (can't pony up their share upfront) but want to be able to use the IP in their fabs at a later date.

 

[tommo123]

ta for the info IDC, insightful as always