What is a "Memory Parity Error"?

[masterc]

For about a year now, I have been running a P3-450 oc'd to 558. It's using PC100 sdram (@124mhz).
Just recently i've been getting a blue screen saying... "Memory Parity Error".
It has only happened when I'm in Autocad or working with large Jpegs in Power Point.
What is going on??? Is this because of my OC'ed system bus???

Any help is appreciated.

 

[SocrPlyr]

your ram may not be able to handle the increased fsb
maybe you should look into getting some pc133 ram
basically anytime you get a mem parity error it is bad ram but since your situation is as it ur mem prolly just can't take the fsb
mayb try moving it down a bit just to see if the errors go away

Josh

 

[ruckb]

Hi,

some background info:
The databus, from the SDRAM to the processor is 64 bit width (normally 8 memory chips on one DIMM, and every chip has an 8bit width memroy bus 8x8 = 64). There is a possiblity to detect errors with a parity function. This means, that you have an additional Bit per 8 databits (==> you have 9 chips on your DIMM (or 2x9=18 for a two bank DIMM). with this additional bit the chipset can decide whether the data read from the DIMM is correct. there are several algorithms, that allow you to detectcorrect different kinds of errors (often correct single bit, and detect doulbe bit errors). Of course, the possibility to get an error is 1/8 higher with 9 devices than with 8 (the parity device can include an error too).

SocrPlyr's suggestions are the right way,
There is a (VERY) dirty solution too: disable the ECC in the BIOS when possible. If the failure is happening in the parity device your problems are gone (not very likely, and if this chip is on its edge, the others are close to a failure too).
If the error is happening in one of the data storage chips, the system is not able any more to detect the error, and is working on with the wrong data. Than it depends what is stored at the failing cell. If its part of the picture then you will have set one bit wrong in your picture, If it is part of the system/program code your system behaviour can be very inpredictable.

recomendation: reduce the FSB a little bit.

ruckb

 

[OneEng]

On the technical side, what a parity error is:

Parity of a piece of data is the cumulated sum of all the ones in the binary representation. If this sum is even, then the parity bit is 0, if the sum is odd, then the parity bit is 1.

Example:
Lets say a piece of data is sent as 15 decimal. This is 0x0F in hexidecimal or 0000 1111 in binary. Counting up the ones we get 4 which is even. This would lead to an even parity bit or 0. Essentially, the parity bit is carried around with every data transfer. The sender of the data calculates the parity and adds the appropriate bit at the end. The receiver then re-does the calculation to see if the data and its parity match up.

Note that it is possible to have 2 errors and get the correct parity bit in any data transfer.

As to your problem, it is most certianly caused by your over clocking. Back off of the settings a bit, then run this utility to make sure your memory subsystem is alright at the new speed:
http://reality.sgi.com/cbrady_denver/memtest86

Good luck!

 

[ruckb]

Hi OneEng,

as I wrote my reply, I realized, that I do not know the algorithms for ECC. I knew, that a single bit error can be corrected, and a double bit error can be recoginzed, but I don't know how it is done.
I started looking for this Info in the internet, but found right now nothing that really explained the algrorithms behind ECC.

Do you know this theorie, or do you have some source in the internet?

thanks

ruckb

 

[ruckb]

Hi,

i don't know, if anybody in interessted, but I found a nice explanation about ECC with Hamming Code under

http://www.imsmemory.net.au/memory_facts/present_problem.htm

There are some typos in it, and one thing I do still not understand, but its easy to read.

bye

ruckb

 

[OneEng]

Linkafied:
http://www.imsmemory.net.au/memory_facts/present_problem.htm

I will look at it tommorow. Time for bed right now.

ECC memory is different than normal parity memory (I think). ECC is normally used on mission critical servers to prevent any crashes. I am curios about this anyway. Thx for the link!

 

[Mday]

ECC is the replacement for parity. there is no direct relationship except they do the same thing.

parity is obsolete. ECC does more than parity ram.

 

[Mday]

i believe that parity just tells you there is an error, while ECC is capable of "fixing" it.

 

[Herr Yunta]

Mday, Parity is not obsolete, your using it now.

Your SPD may have died. Hopefully not, back the bus down to like 112 if you want to continue using that stick. I can tell thats not an Asus mobo.

 

[Mday]

i did not mean parity itself is obsolete, i mean having to get "parity" ram is pretty much gone... as in the EDO days... it's more like ECC superceded parity then, i suppose.

 

[ruckb]

HI,

there is just one chip more on the DIMM. Whether it is used as
parity or as ECC is completle up to the chipset.

ruckb