What are RDIMMs actually needed for?

OVerLoRDI

Diamond Member
Jan 22, 2006
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Based on some of the discussion in this thread:

http://forums.anandtech.com/showthread.php?t=2261395

My interest was peaked regarding when RDIMMs become imperative. Seems to me, as a normal hardware user, that normal ram is stable enough. I had a large number of machines running 24/7 for months on end using normal ram and never had any issues related to bad bits. Was I just lucky? Or are applications that slush so much data in and out of ram that errors start to appear? If so, what are these applications?
 

Blain

Lifer
Oct 9, 1999
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Seems to me, as a normal hardware user, that normal ram is stable enough. I had a large number of machines running 24/7 for months on end using normal ram and never had any issues related to bad bits. Was I just lucky?
* Unless you're running mission critical applications, you can get by with unbuffered non-ECC DIMMs.
* "never had any issues related to bad bits"
You mean that you've never had any noticible (verifiable), problems from bad bits, correct?
 

ShintaiDK

Lifer
Apr 22, 2012
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Are you asking what registered memory does? Or by what ECC does?

ECC should soon be mandatory on the desktop, since the chance of biterrors rapidly increases with shrinks and increased densities. And its not like its really expensive. 1/8th the higher cost. And I am sure we can afford to pay 55$ for the currently 49$ 8GB kit.

Registered memory usually allows for more DIMMs and less electrical load on the memory controller. But it also got a little performance penalty.

There is also a study on it here for the errors part:
http://www.cs.toronto.edu/~bianca/papers/sigmetrics09.pdf

Its not small numbers.
 
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OVerLoRDI

Diamond Member
Jan 22, 2006
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Are you asking what registered memory does? Or by what ECC does?

ECC should soon be mandatory on the desktop, since the chance of biterrors rapidly increases with shrinks and increased densities. And its not like its really expensive. 1/8th the higher cost. And I am sure we can afford to pay 55$ for the currently 49$ 8GB kit.

Registered memory usually allows for more DIMMs and less electrical load on the memory controller. But it also got a little performance penalty.

There is also a study on it here for the errors part:
http://www.cs.toronto.edu/~bianca/papers/sigmetrics09.pdf

Its not small numbers.

Thanks, I'll check out the study.
 

imagoon

Diamond Member
Feb 19, 2003
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Are you asking what registered memory does? Or by what ECC does?

ECC should soon be mandatory on the desktop, since the chance of biterrors rapidly increases with shrinks and increased densities. And its not like its really expensive. 1/8th the higher cost. And I am sure we can afford to pay 55$ for the currently 49$ 8GB kit.

Registered memory usually allows for more DIMMs and less electrical load on the memory controller. But it also got a little performance penalty.

There is also a study on it here for the errors part:
http://www.cs.toronto.edu/~bianca/papers/sigmetrics09.pdf

Its not small numbers.

Parity is 1/8 higher [in theory] since it is 9 bits stored to 8 bits utilized. ECC is 12bits : 8bits so there is a 50% mark up purely in the chips. In addition the memory controller needs to support it. For example the 3750k doesn't (http://ark.intel.com/products/65520/Intel-Core-i5-3570K-Processor-(6M-Cache-up-to-3_80-GHz)). Z77 doesn't support it either.

The cost is more than just the RAM. You would need a Xeon running a Z79 for example to get support plus the premium on the RAM itself.
 

ShintaiDK

Lifer
Apr 22, 2012
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Parity is 1/8 higher [in theory] since it is 9 bits stored to 8 bits utilized. ECC is 12bits : 8bits so there is a 50% mark up purely in the chips. In addition the memory controller needs to support it. For example the 3750k doesn't (http://ark.intel.com/products/65520/Intel-Core-i5-3570K-Processor-(6M-Cache-up-to-3_80-GHz)). Z77 doesn't support it either.

The cost is more than just the RAM. You would need a Xeon running a Z79 for example to get support plus the premium on the RAM itself.

Actually 3570K supports it, its just disabled artificially. And it got nothing to do with chipsets.

Here is a slibling to 3570K. Just with ECC and HT.
http://ark.intel.com/products/65729/Intel-Xeon-Processor-E3-1245V2-(8M-Cache-3_40-GHz)

Same core, same wafer. Just without disabled features. (Cept its locked.)
 

rsutoratosu

Platinum Member
Feb 18, 2011
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I have rdimms on my server.. 18 slots ddr3, insane. i think max is 192gb.. i only have 40 so far
 

jwilliams4200

Senior member
Apr 10, 2009
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Parity is 1/8 higher [in theory] since it is 9 bits stored to 8 bits utilized. ECC is 12bits : 8bits so there is a 50% mark up purely in the chips.

You were right the first time. ECC uses an extra bit for every 8 bits. It does NOT use an extra 50%.

If you look at 240-pin DDR3 DIMMs, a non-ECC DIMM has 64-bit wide ranks, and an ECC DIMM has 72-bit wide ranks. 72/64 = 9/8. That is 12.5% overhead.

I'm not sure where you got 50% overhead from, but it is just not true. ECC overhead is 12.5%.
 

imagoon

Diamond Member
Feb 19, 2003
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Actually 3570K supports it, its just disabled artificially. And it got nothing to do with chipsets.

Here is a slibling to 3570K. Just with ECC and HT.
http://ark.intel.com/products/65729/Intel-Xeon-Processor-E3-1245V2-(8M-Cache-3_40-GHz)

Same core, same wafer. Just without disabled features. (Cept its locked.)

Artificially disabled = disabled. 3570k does not support ECC. And yes the memory controller is in the CPU, Intel lists the Z77 as not supporting ECC. It could simply mean they don't test it though as some Xeons will work with Z77.

Remember you do need a BIOS that can enable ECC.
 

imagoon

Diamond Member
Feb 19, 2003
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You were right the first time. ECC uses an extra bit for every 8 bits. It does NOT use an extra 50%.

If you look at 240-pin DDR3 DIMMs, a non-ECC DIMM has 64-bit wide ranks, and an ECC DIMM has 72-bit wide ranks. 72/64 = 9/8. That is 12.5% overhead.

I'm not sure where you got 50% overhead from, but it is just not true. ECC overhead is 12.5%.

Good point. I forgot they do bank ECC with DDR+.