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[VideoCardz] NVIDIA to preview 20nm high-end Maxwell tomorrow

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really cause they were talking quite a lot about Pascal, and even had a nonfunctioning replica (woodscrew 2.0) on stage too

Which is why they were all over Pascal today, and Volta last year...

Clearly shown by the Pascal talk. Oh, wait.

You're all referencing concepts and ideas or a roadmap. NTMBK explicitly mentioned a 20nm Maxwell product.

"If NVidia had a 20nm Maxwell coming this year, they would have talked about it today."

There is a difference between a roadmap and an actual sku.
Look at what is being asked, and said.
 
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Will probably be a 20nm Maxwell flagship available by the time the winter holiday buying season rolls around. With Nvidia announcing the Titan Z I'd be shocked if it showed up any sooner than late September.
 
Will probably be a 20nm Maxwell flagship available by the time the winter holiday buying season rolls around. With Nvidia announcing the Titan Z I'd be shocked if it showed up any sooner than late September.

This sounds likely to be the most plausible scenario. I mean, the architecture seems to be well underway (28nm 750/750Ti) so it's all a matter of waiting for 20nm to ramp.
 
Looks like the CPU has to support NVLink for it to share resources with the GPU. Good luck getting Intel to support this. It might be specifically for Denver.

With the Intel/nVidia licencing deals done over the last few years Intel would probably support this as it would also be useful on Larrabees future generations. AMD might even support it (albeit both will likely rename it) if they can get a benefit from it.
 
Gloomy, lets not do this. You know what I'm talking about now can we leave it at that? Thanks.

No we dont, because last big conference he also talked about k1 and its release its somewhat inminent. I dont even know how you could have pulled that affirmation with a straight face.

JHH should change his last name to Osborne, it would really do him justice.
 
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A possible reason unified mem was scratched from Maxwell is that nVidia is relying on an industry standard to evolve rather than try and get AMD and/or Intel to cooperate with them. The options of including it on something other than X86 seems unlikely for the PC market.
 
Just look at GTC 2012. http://www.anandtech.com/show/5840/...s-gk104-based-tesla-k10-gk110-based-tesla-k20 They were openly discussing the Tesla K20, its specs and its capabilities, despite the fact that it wasn't due out for another 2 quarters. If a similar generational improvement was coming, they would be talking about it. Instead they're talking about Pascal in 2016.

The "gaming" range of 28nm Maxwells is coming, yes. But if they had a real GK110 replacement in the wings, they would be telling their CUDA developers about it.
 
A possible reason unified mem was scratched from Maxwell is that nVidia is relying on an industry standard to evolve rather than try and get AMD and/or Intel to cooperate with them. The options of including it on something other than X86 seems unlikely for the PC market.

NVidia? Industry standard? :awe:

Warning issued for trolling.
-- stahlhart
 
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the real question is how many motherboard manufacturers are going to bother coming out with multiple mezzanine connectors for nvlink.
NVIDIA’s Pascal prototype is one such example of what a card would look like. We cannot see the connector itself, but the basic idea is that it will lay down on a motherboard parallel to the board (instead of perpendicular like PCIe slots), with each Pascal card connected to the board through the NVLink mezzanine connector. Besides reducing trace lengths, this has the added benefit of allowing such GPUs to be cooled with CPU-style cooling methods (we’re talking about servers here, not desktops) in a space efficient manner. How many NVLink mezzanine connectors available would of course depend on how many the motherboard design calls for, which in turn will depend on how much space is available.

But the rabbit hole goes deeper. To pull off the kind of transfer rates NVIDIA wants to accomplish, the traditional PCI/PCIe style edge connector is no good; if nothing else the lengths that can be supported by such a fast bus are too short. So NVLink will be ditching the slot in favor of what NVIDIA is labeling a mezzanine connector, the type of connector typically used to sandwich multiple PCBs together (think GTX 295). We haven’t seen the connector yet, but it goes without saying that this requires a major change in motherboard designs for the boards that will support NVLink. The upside of this however is that with this change and the use of a true point-to-point bus, what NVIDIA is proposing is for all practical purposes a socketed GPU, just with the memory and power delivery circuitry on the GPU instead of on the motherboard.
NeoScale.jpg

http://www.anandtech.com/show/7900/nvidia-updates-gpu-roadmap-unveils-pascal-architecture-for-2016
not even sure how many sli setups you can get when the pcb have to lie parallel to the mb. and how are the power cables supposed to connect?
 
Why do you think NVidia is spending so much money developing an ARM core, and cosying up to IBM?

That's fine, but what about the desktop X86 market. I can't imagine that they don't need to sell to that market as well. AMD will want to have an industry standard (as they always do) for unified memory and will want it to include dGPU. nVidia is not too proud to use standards like Display Port with GSync.

Just a possibility. Curious to see what happens.
 
NVLink is PCIe based. But its only used for GPU to GPU.

Nvidia_GTC2014_nvlink_nvidia.jpg


It helps to do the homework before complaining.
 
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What does IBM have to do with anything?

In there press release

NVIDIA will add NVLink technology into its Pascal GPU architecture -- expected to be introduced in 2016 -- following this year's new NVIDIA Maxwell compute architecture. The new interconnect was co-developed with IBM, which is incorporating it in future versions of its POWER CPUs.

"NVLink technology unlocks the GPU's full potential by dramatically improving data movement between the CPU and GPU, minimizing the time that the GPU has to wait for data to be processed," said Brian Kelleher, senior vice president of GPU Engineering at NVIDIA.

Source: http://nvidianews.nvidia.com/Releas...ng-Pave-the-Way-to-Exascale-Computin-ad6.aspx
 
Looks like the CPU has to support NVLink for it to share resources with the GPU. Good luck getting Intel to support this. It might be specifically for Denver.
It's for POWER 8 only at this point in time besides Intel chips will not need this type of high speed (proprietary)interconnect anytime soon, as they're satisfied with ye olde PCIe for now 😛
 
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