VIA's new CPU: Isaiah, and its good!

[Cheex]

Originally posted by: aigomorla

Originally posted by: Zenoth
I can see AMD buying VIA.

Hmmm... no.

It might be the other way around...

LMAO!

thats if samsung doesnt gobble it up first.




Imagine a large 25000:1 contrast Flat screen TV with an AMD processor built in on an ATI chipset with ATI card.

nice little all in 1 package.

It is called a Mac..Guyver

 

[dmens]

Originally posted by: CTho9305
Some thoughts:

• Based on this photo, it looks like a substantial amount of the design is custom rather than synthesized. I had always assumed Centaur's CPUs were almost completely synthesized.
• It looks like the various parts are placed with routing channels in between them, which has plusses and minuses when compared to directly abutting the components (the plus is reduced design effort; the minus is the area penalty; compared to the 65nm K8 die, there is much more white space.)
• A single-core die + 1MB is 60mm^2. A 65nm dual-core K8 + 512KB per core + a northbridge is 126mm^2, so a K8 + 512KB + half a northbridge is 63mm^2. I guess that puts the total area of the core in the same ball park.
• Isaiah is 25W @ 2GHz @ 1.15V. The BE series of AMD chips is 45W @ 2.3GHz @ 1.25V (for 2 cores+northbridge). If AMD chopped a core and the northbridge, and undervolted to run at 2GHz (instead of using worse bins and keeping it at higher voltages), the power would probably drop substantially, but the Isaiah still doesn't look bad at all.
• Assuming 70M transistors per MB of L2 cache, Isaiah is 94-70=24M transistors. I can't remember numbers for K8 / Core 2, but I think they're both more transistors.
• Their L1 is 64KB, 16-way associative. That's bigger than Intel's L1's, and more associative than AMD's. Their load to use penalty is 4 cycles rather than 3 though. I wonder whether the 4 cycle latency is caused by that cache... or if other aspects (e.g. the memory disambiguation, store-to-load forwarding for different access sizes, etc) were complex enough that they were the critical path, making enough time available to use a large and highly-associative L1.
• Their "7-wide" execution is less than K7 and K8 (3 load or store address, 3 integer, 3 float), but I think it's wider than Core 2 (I count 6, using Via's nomenclature).
• Their decoder sounds like it might be more powerful than Intel's, which can only handle a subset of instructions in all slots except the first slot. Having the front-end run ahead when one instruction is in the microcode ROM is pretty clever. Some of the microcode stuff makes me wonder if they've been reading competitors' patents (or whether everybody handles it the same way when taking a 10,000ft view).
• It's interesting that their division and square root happen on their adder port rather than the multiply port. I wonder if they have dedicated hardware for those operations.
• The thermal management features are cool.
• In the video, the guy puts Silverthorne and Isaiah in the same power range. I think Silverthorne's power is significantly lower than that (.5-2 watts rather than ??-25W).
• This chip was first announced in 2004, for first availability in 1H06!

Intel's "super portable" CPU is called Silverthorne (or Bonnell) and it's somewhere in the 0.5-1W range. This thing is 25W at 2GHz. The IPC of Isaiah is probably a lot higher, but even at low frequencies and reduced voltages it's not competing in the same ballpark. The die is also enormous in comparison, which means Silverthorne would be significantly cheaper.

That said, this still sounds pretty cool.

- The whole thing still looks mostly synthesized to me, the logic blocks look "fuzzy" with place and route channels at the global level.
- not too sure what to make of the decoder and execution "width" since i have no idea how their uops work.
- i.r.t. decoder being more "powerful", that's a strange word to use, especially in light of the fact that ROM lookups are not very common anyways. throughput is power.
- silverthorne has a much lower power envelope than this product, im pretty sure.
- curious to see what target VIA has in mind for this.

 

[Idontcare]

Originally posted by: Cheex

Originally posted by: aigomorla

Originally posted by: Zenoth
I can see AMD buying VIA.

Hmmm... no.

It might be the other way around...

LMAO!

thats if samsung doesnt gobble it up first.




Imagine a large 25000:1 contrast Flat screen TV with an AMD processor built in on an ATI chipset with ATI card.

nice little all in 1 package.

It is called a Mac..Guyver

McGruber FTW!

On a serious note though I knew THE guy (worked with him for 3 years) that managed the entire process engineering team at Samsung who was responsible for being the second-source for DEC Alpha chips.

Needless to say attempting to produce large and complex logic die were such a nightmarish headache for Samsung (based on the mounting stories and examples I learned over the course of 3 years) that I doubt very much that samsung would ever jump back onto that treadmill by acquiring AMD.

Want to talk about a workweek? Try 13 days on and 1 day off. That's right, they pushed their fab engineers (engineers! not speaking about techs or manufacturing specialists even) to the point where they got 2 days off per month, and they had to do that for years just to get the alpha chip yielding acceptable results. Samsung has zero desire to get into microprocessor logic and compete with Intel.

 

[IntelUser2000]

You left out ECC bits and tags

Well, I wanted to show the TRUE transistor count .

Aren't all CPUs "asymmetrical"? On K7 there's an FP adder pipe, an FP multiply pipe, and a pipe that handles misc stuff (format conversion or stores or something... I forget). The Core microarchitecture has different units on the various ports too, right?

Well, sure it is. But saying that the total FP power is much more powerful on the Core/Phenom cores. Core 2 has 3 SSE capable units, but 2 are symmetrical, and is same with Phenom. With Isaiah, its 2 SSE capable, but they are not symmetrical.

Just saying AMD isn't out .

 

[CTho9305]

Originally posted by: dmens
- The whole thing still looks mostly synthesized to me, the logic blocks look "fuzzy" with place and route channels at the global level.

This is my first guess guess at the synthesized parts (the sepia ones... I think there's 2 more in the L2 but I didn't color them). Most of the rest of the blobs look like they could be done by hand, or are arrays/macros. Of course, the arrays could be compiled arrays.

- i.r.t. decoder being more "powerful", that's a strange word to use, especially in light of the fact that ROM lookups are not very common anyways. throughput is power.

I didn't really mean the ROM stuff, I meant decode slot restrictions. But you're right, what matters is real-world throughput.

- silverthorne has a much lower power envelope than this product, im pretty sure.
- curious to see what target VIA has in mind for this.

I think their definition of UMPC is different from what Intel is demoing with Silverthorne - they're talking devices sized like the very first generation of Game Boy up to subnotebooks, whereas Intel is talking "big iPhone" for now, and probably "iPhone" later.

Originally posted by: IntelUser2000

Aren't all CPUs "asymmetrical"? On K7 there's an FP adder pipe, an FP multiply pipe, and a pipe that handles misc stuff (format conversion or stores or something... I forget). The Core microarchitecture has different units on the various ports too, right?

Well, sure it is. But saying that the total FP power is much more powerful on the Core/Phenom cores. Core 2 has 3 SSE capable units, but 2 are symmetrical, and is same with Phenom. With Isaiah, its 2 SSE capable, but they are not symmetrical.

Just saying AMD isn't out .

Which FP/SIMD units are symmetrical in Phenom?

 

[IntelUser2000]

Which FP/SIMD units are symmetrical in Phenom?

Same thing that has been symmetrical since K7. K7 based derivatives have 3 FP units but only 2 are symmetric. Similar with Conroe, but with SSE.

 

[CTho9305]

Originally posted by: IntelUser2000

Which FP/SIMD units are symmetrical in Phenom?

Same thing that has been symmetrical since K7. K7 based derivatives have 3 FP units but only 2 are symmetric. Similar with Conroe, but with SSE.

I'm still confused. As far as I can tell, based on the optimization guide, each of the 3 FP pipes has some unique things it supports (for example, there's an FADD pipe, an FMUL pipe, and an FSTORE pipe... ADDPD can only execute in the FADD pipe; PMULLW can only execute in the FMUL pipe; CVTPI2PD can only execute in the FSTORE pipe. That said, some instructions can execute in either FADD or FMUL (e.g. ANDNPD), and some instructions can execute in any of the pipes (e.g. MOVAPS)). I'm calling that asymmetrical - are we defining symmetrical differently?

The 3 integer ALUs and 3 AGENs may be symmetrical. I think the AGENs are; I'm not sure if the ALUs are (e.g. IMUL may be limited to one of those ports).

 

[Rottie]

Originally posted by: StormRider
It's great to see more players in the CPU market. What sort of motherboard would be able to take a Via processor? What type of socket does it uses?

ECS motherboard maker might take a VIA processor

 

[taltamir]

i want to see it at the end of the year with SSE4 and dual core... it sounds delicious.

 

[dmens]

Originally posted by: CTho9305
This is my first guess guess at the synthesized parts (the sepia ones... I think there's 2 more in the L2 but I didn't color them). Most of the rest of the blobs look like they could be done by hand, or are arrays/macros. Of course, the arrays could be compiled arrays.

here are my guesses in red. The green square looks like a compiled PLA. I would also assume the arrays here are done with template, that is standard unless frequency is a major concern. the resolution on the picture isn't nearly high enough to tell with more certainty.

 

[BlueAcolyte]

That's pretty kickass... Now if you could fit that into a dual-core and put it on a UMPC...

 

[IntelUser2000]

I'm still confused. As far as I can tell, based on the optimization guide, each of the 3 FP pipes has some unique things it supports (for example, there's an FADD pipe, an FMUL pipe, and an FSTORE pipe... ADDPD can only execute in the FADD pipe; PMULLW can only execute in the FMUL pipe; CVTPI2PD can only execute in the FSTORE pipe. That said, some instructions can execute in either FADD or FMUL (e.g. ANDNPD), and some instructions can execute in any of the pipes (e.g. MOVAPS)). I'm calling that asymmetrical - are we defining symmetrical differently?

Right, sorry I am confused. This means that Isaiah has same FP power as Core 2/Phenom. Likely Phenom is in trouble now XD.

 

[taltamir]

the phenom was already in trouble (as in, doomed level trouble). another played doesn't change much

 

[Zap]

Originally posted by: CTho9305

• In the video, the guy puts Silverthorne and Isaiah in the same power range. I think Silverthorne's power is significantly lower than that (.5-2 watts rather than ??-25W).

Supposedly 25W was an incorrect figure and the correct one is 20W TDP, and the reason that they claim similar power range to Silverthorne is that supposedly under "normal" usage patterns and performance levels the VIA chip will use the same amount of power.

 

[taltamir]

isn't silverthorn limited by having to use a high powered PC bus? the silverthorn power will go down once they finish making a unique chipset for it.

 

[ch33zw1z]

This little cpu sounds great. Maybe Asus will throw it in their EEE PC's, that would definitely put the nail in the coffin and make me get one. I just can't purchase anything with a Celery in it lol.

 

[taltamir]

what about soup? do you purchase soup with celery?

 

[ch33zw1z]

Originally posted by: taltamir
what about soup? do you purchase soup with celery?

BAHAHAHA no.

 

[Zap]

It just occurred to me that the codename of this chip is really similar to the name of a friend of mine who is now in jail.

Isaias

 

[taltamir]

You need new friends. Ones of the non crazy variety.

 

[Zap]

I haven't seen him in almost 3 years, though I have talked to him on the phone as recent as a month before the incident. He was a pretty nice guy, never one to get into trouble or anything, and he was a great all-round gamer (good in every game, and unbeatable in WolfET and C&C Generals/Zero Hour). Nobody who have known him in person understands what went wrong... it just wasn't like him.

 

[ArchAngel777]

Originally posted by: Zap
I haven't seen him in almost 3 years, though I have talked to him on the phone as recent as a month before the incident. He was a pretty nice guy, never one to get into trouble or anything, and he was a great all-round gamer (good in every game, and unbeatable in WolfET and C&C Generals/Zero Hour). Nobody who have known him in person understands what went wrong... it just wasn't like him.

Any one person is capable of this provided they are in the right circumstance and give in at a moments weekness. I am pretty sure that I hate murder and violent crimes more than anyone, but that doesn't mean I would be immune to that type of behavior if put in the right situation and had the right 'buttons' pushed. That is what scares me most about people carrying fireams on them. It just takes one bout of anger, one very poor call in judgement to ruin someones life. Not worth it, IMO.

 

[Soulkeeper]

it sounds like it could be a good core solo competitor ...
i'm definately interested in some benchmarks

 

[taltamir]

All it means is that you didn't know him. People always make the assumption that they know someone because it has been X years since they met them...
Heck, most people only have small talk with their spouse. That's how they catch a pedophile with his wife of 20 years never even having a clue.

And it scares me more that so many people DON'T carry firearms. He stabbed her to death, over and over and over again. If she was armed she could have shot him in the leg and nobody would have died. But as a lone woman against a determined man with a sharp object... Gun's didn't make him kill her, if he was armed he would have shot her instead of stabbing her, but she would have been just as dead, at least in a firefight she stood a chance.

 

[Zap]

Originally posted by: taltamir
All it means is that you didn't know him. People always make the assumption that they know someone because it has been X years since they met them...

He stabbed her to death, over and over and over again.

She didn't die AFAIK, but was in the hospital.

I hung out with the guy a few times a week for a few years, but yeah you have a point.