Via Nano vs. C7 vs. Atom

[Idontcare]

Google translated to english:
The new VIA Isaiah micro-architecture

 

[Rhoxed]

impressive for VIA

 

[razor2025]

I still haven't seen any real product with Via Nano in it... Regardless of benchmark victories, if you can't get it into the consumer market, your chip will die. Also, where's the Nvidia northbridge/IGP that Nano was suppose to use?

 

[pm]

Thanks for the link, IDK. Interesting stuff.

I had a few questions about the die photo, it lists pads on top and bottom... so it's wire bond? I wonder why they'd go wire bond instead of BGA...? Also, that fuse block is huge... what on earth are they fusing that requires as much die space as the L1D cache? I count 220-ish fuses (11 across by 20 down).. which I guess isn't excessive, but they are big fuses.

 

[CTho9305]

Originally posted by: pm
Thanks for the link, IDK. Interesting stuff.

I had a few questions about the die photo, it lists pads on top and bottom... so it's wire bond? I wonder why they'd go wire bond instead of BGA...?

I think they're just labeling the I/O drivers "pads". The actual bumps would cover the entire surface of the die... I've heard the terminology used this way before.

Also, that fuse block is huge... what on earth are they fusing that requires as much die space as the L1D cache? I count 220-ish fuses (11 across by 20 down).. which I guess isn't excessive, but they are big fuses.

I've wondered about that too.

 

[Idontcare]

It does make you wonder about that sizable fuse block. It's not like they are offering a myriad of SKU's where they are fusing off cores or halving the cache blocks, etc.