Unlike previous Intel® Xeon? processors, the Intel Xeon processor with 512 KB L2 cache does
not sample the pins IGNNE#, LINT[0]/INTR, LINT[1]/NMI, and A20M# to establish the core to
system bus ratio. Rather, the processor runs at its tested frequency at initial power-on. If the
processor needs to run at a lower core frequency, as must be done when a higher speed processor is
added to a system that contains a lower frequency processor, the system BIOS is able to effect the
change in the core to system bus ratio.