TSMC Q3'14: No 16nm in 2015, no EUV at 10nm

[witeken]

Please provide link then. I'm pretty sure they never said that.

I won't bother to find a link, but do you realize that the burden of proof is yours; TSMC replaced their planar with a FinFET transistor but kept the same BEOL, but then they realized they could do some optimizations to improve density by 15%, so they developed this slightly superior version of their 1st FinFET node. I clearly remember reading the quote from TSMC about it.

 

[witeken]

Again, Thread title = TSMC Q3'14: No 16nm in 2015

This thread is about TSMCs 16nm production, not 16nm products in retail. If you want to talk about products in retail, tell a admin to fix the thread title. 😉

Did anyone honestly think I meant HVM? HVM is short and easy to write for a thread title, and something unusual must have happened for them to delay 16nm by that much.

No one cares much about HVM. It may start in 2015, but there will be very few if any SoCs built with the process that come out in that year, that's what's important.

I can only summarize so much in a title. If you're interested, you should read the whole thing.

 

[NTMBK]

Did anyone honestly think I meant HVM? HVM is short and easy to write for a thread title, and something unusual must have happened for them to delay 16nm by that much.

No one cares much about HVM. It may start in 2015, but there will be very few if any SoCs built with the process that come out in that year, that's what's important.

This is in danger of becoming a double standard. Whenever we discuss Intel process dates, we refer to when the chips are being produced, not when finished PCs using the chips are on shelves.

Of course it's a little different for Intel, because you can buy the CPU directly and build a system with it yourself. Not sure what the best way to be consistent would be. *shrug*

 

[AtenRa]

Did anyone honestly think I meant HVM? HVM is short and easy to write for a thread title, and something unusual must have happened for them to delay 16nm by that much.

No one cares much about HVM. It may start in 2015, but there will be very few if any SoCs built with the process that come out in that year, that's what's important.

I can only summarize so much in a title. If you're interested, you should read the whole thing.

Thread title as it is now means TSMC will not have 16nm production in 2015. If you dont mean that then thread title is wrong and you should ask an admin to fix it.

Simple as that.

 

[witeken]

This is in danger of becoming a double standard. Whenever we discuss Intel process dates, we refer to when the chips are being produced, not when finished PCs using the chips are on shelves.

Do we? For example, Intel stated they'd begin 10nm production in 2015. I never use this plain number. I always use it to note that there will be 10nm products on shelves in 2016.

 

[witeken]

Thread title as it is now means TSMC will not have 16nm production in 2015. If you dont mean that then thread title is wrong and you should ask an admin to fix it.

Simple as that.

Tell me, where do you see "No 16nm production/HVM in 2015"? You don't, you've read the first post and you know the details, so this discussion is quite meaningless.

 

[AtenRa]

Tell me, where do you see "No 16nm production/HVM in 2015"? You don't, you've read the first post and you know the details, so this discussion is quite meaningless.

example


Thread title = Intel Q3 2014: no 14nm in 2014

But my title is not about 2014 14nm production, did you see anything to point out about HVM ?? im talking about 14nm broadwell desktop not being ready in 2014. 🙄


Got it now ???

 

[krumme]

So net revenue is up, gross margin is up, operating margin is up, net profit margin is up. What's not to like? 🙂

Yes to be precise: YoY Q3 Revenue up 29% Profit up 47%. 16nm on track as planned for 2015 production.

 

[lefty2]

I won't bother to find a link, but do you realize that the burden of proof is yours; TSMC replaced their planar with a FinFET transistor but kept the same BEOL, but then they realized they could do some optimizations to improve density by 15%, so they developed this slightly superior version of their 1st FinFET node. I clearly remember reading the quote from TSMC about it.

That's because there is no link.
Maybe you are getting confused with speed. TSMC said FinFET plus would be 15% faster than regular FinFET 16.
Actually, you can look at HiSilicion announcement: http://www.tsmc.com/tsmcdotcom/PRListingNewsAction.do?action=detail&newsid=8821&language=E
That says "twice the gate density of TSMC’s 28HPM process", as opposed to 1.9 for 20nm

 

[III-V]

That's because there is no link.
Maybe you are getting confused with speed. TSMC said FinFET plus would be 15% faster than regular FinFET 16.
Actually, you can look at HiSilicion announcement: http://www.tsmc.com/tsmcdotcom/PRListingNewsAction.do?action=detail&newsid=8821&language=E
That says "twice the gate density of TSMC’s 28HPM process", as opposed to 1.9 for 20nm

If you can't find a link for your claim, then it can be disregarded. Also, have you ever heard of rounding?

 

[witeken]

That's because there is no link.
Maybe you are getting confused with speed. TSMC said FinFET plus would be 15% faster than regular FinFET 16.
Actually, you can look at HiSilicion announcement: http://www.tsmc.com/tsmcdotcom/PRListingNewsAction.do?action=detail&newsid=8821&language=E
That says "twice the gate density of TSMC’s 28HPM process", as opposed to 1.9 for 20nm

Twice the gate density doesn't necessarily mean twice the transistor density. BTW, 1.9 / (1-0.15) = 2.23.

 

[III-V]

That's because there is no link.
Maybe you are getting confused with speed. TSMC said FinFET plus would be 15% faster than regular FinFET 16.
Actually, you can look at HiSilicion announcement: http://www.tsmc.com/tsmcdotcom/PRListingNewsAction.do?action=detail&newsid=8821&language=E
That says "twice the gate density of TSMC’s 28HPM process", as opposed to 1.9 for 20nm

Here's your source:

http://seekingalpha.com/article/214...-2014-results-earnings-call-transcript?page=3

In the future, I'd appreciate it if you'd cite your claims when you bear the burden of proof.

 

[lefty2]

Here's your source:

http://seekingalpha.com/article/214...-2014-results-earnings-call-transcript?page=3

In the future, I'd appreciate it if you'd cite your claims when you bear the burden of proof.

Nowhere in that document does it say that regular FinFET 16 is not 15% density improvement.
TSMC published IEDM papers on their processes (unfortunately not available on internet) but they show the SRAM size for 20nm is 0.081 um2 and FinFET 16 is .07 um2.
TSMC gave no information on FinFET plus at IEDM, but one assumes the density is the same.

 

[III-V]

Nowhere in that document does it say that regular FinFET 16 is not 15% density improvement.
TSMC published IEDM papers on their processes (unfortunately not available on internet) but they show the SRAM size for 20nm is 0.081 um2 and FinFET 16 is .07 um2.
TSMC gave no information on FinFET plus at IEDM, but one assumes the density is the same.

I'm backing up your claim.

 

[Abwx]

You can do the math yourself:

20nm HVM: Janury 2014
Products (iPhone/iPad): September/October 2014
Delta: 8-9 months

16nm supposed delta: 8-9 months
HVM: ~June 2015
Products: February 2016

Also note that this is only the iPad and iPhone. When will we see the first 20nm Qualcomm, who has a market share of high double digits, SoCs? A year after HVM started.

But because OEM products have to be aligned, the first 16nm product will probably be the Galaxy S6, unless Samsung can do better and Qualcomm moves to them. Weren't they supposed to start HVM in this quarter?

Does TSMC get paid for the 16nm waffers they will deliver on Q4 2015 only when the resulting products will be on shelves..?

 

[witeken]

Nowhere in that document does it say that regular FinFET 16 is not 15% density improvement.
TSMC published IEDM papers on their processes (unfortunately not available on internet) but they show the SRAM size for 20nm is 0.081 um2 and FinFET 16 is .07 um2.
TSMC gave no information on FinFET plus at IEDM, but one assumes the density is the same.

 

[witeken]

Does TSMC get paid for the 16nm waffers they will deliver on Q4 2015 only when the resulting products will be on shelves..?

I guess not.

 

[mavere]

20nm HVM: Janury 2014
Products (iPhone/iPad): September/October 2014
Delta: 8-9 months

I don't know what else to expect considering the thread title, but it's ridiculous to use the absurd volumes of an iPhone launch as any sort of production barometer.

Also, like others said, Qualcomm had their 20nm modems out a couple months beforehand.

 

[Abwx]

I guess not.

So the title should be "no 16nm derived products in 2015".

If the topic is about TSMC then there will be 16nm waffers delivered in Q4 2015 and they ll get the money in 2015 wich mean that this will be part of their 2015 revenue.

 

[witeken]

I don't know what else to expect considering the thread title, but it's ridiculous to use the absurd volumes of an iPhone launch as any sort of production barometer.

Also, like others said, Qualcomm had their 20nm modems out a couple months beforehand.

I was going to say that, but Qualcomm doesn't sell its SoCs directly, so we'll have to wait till other products are launched. For example Qualcomm's S810 will probably be used firstly on Samsung S6, which isn't in December or January. 16nm won't be different, certainly not when HVM starts a significant number of months later.

 

[Fox5]

Well, this certainly explains why Maxwell wasn't delayed until the 16nm process was available. I wonder if AMD is delaying their cards until then?

Maybe AMD will launch on global foundries.

Is AMD skipping 20nm?

 

[lefty2]

Sorry, I have no idea why you posted that graph.

 

[witeken]

To show that 16FF doesn't have a 15% reduction in die area compared to 20nm.

 

[TrulyUncouth]

To show that 16FF doesn't have a 15% reduction in die area compared to 20nm.

Isn't that an old intel graph?

 

[lefty2]

To show that 16FF doesn't have a 15% reduction in die area compared to 20nm.

No it doesn't.
It shows a graph with no units on the y-axis. Now, anytime you see a graph with no units a deception is probably involved. In this case, we found out later from Intel that the units were metal pitch x gate pitch, which is *not* the same as density.
FintFET 16 SRAM cell is 14% smaller than 20nm SRAM cell, despite both having the same metal and gate pitches