Originally posted by: Wreckage
Originally posted by: Asianman
mod edit (non-"back on topic" part removed)
Back on topic, would the yield issues affect ATI's profit margins or TSMC's. Who actually takes the losses for the bad chips?
I'm sure TSMC can raise their prices to compensate. Especially if UMC is no where near 40nm.
The contract prices are locked, TSMC can't effectively raise prices in a dynamic fashion as some folks might envision it to be from the way you word that statement.
But the answer to the question of "who pays for poor yield" is that "we do"...the end customer.
How those dollars travel up-stream thru the retailer to the distributor to the designer and the fabber is a matter of contract.
TSMC sells wafers. By that I mean when you contract with TSMC you don't buy chips, you don't buy yield, you buy produced/finished wafers. Those wafers may have 20% yield, they may have 90% yield.
Now in the contract there are some (naturally) boundary conditions regarding how crappy a wafer or lot can be before it is scrapped inline instead of being considered sellable product from TSMC's point of view. And therein lies the rub when it comes to wafer pricing and yields.
A customer (ATI for example) might be willing to contractually accept more variability in yield (and a lower acceptable minimum yield number) in exchange for a lower price/wafer contract. For example let's say they accept any wafers with 20% yield or more in exchange for a price of $6k/wafer.
Now yield is a partly function of die-size (defect density, D0, related) so a 20% yielding wafer for ATI's 137mm^2 is a very different situation versus trying to yield 20% with a 500mm^2 die. So NV might have a contract that stipulates the minimum acceptable yield is 20% as well, but TSMC requires $7k/wafer for those 500mm^2 die. In effect TSMC is charging NV more (in my hypothetical example) than they are charging ATI to compensate for the yield discrepancy between the two chip designers.
But in the end who really pays for those wafers, be they $7k/wafer or $3k/wafer? We do. And that is why it is perfectly reasonable for us enthusiasts to talk about, and care about, die-size and TSMC's yields and HOL (health of the line).
