Actually that's rather OT, considering that the thread title is about "Trends in Multithreaded processing", so we could also discuss some new ideas for cache coherency and co, since I think we all agree that the current ones won't scale very well to dozens or even hundreds of cores.
Imho a bit more interesting than the nth CISC vs. RISC discussion
PS: And while I'm way too young to have actively programmed a PDP11 or anything, I've had some CA lectures and I must say, the PDP11 CISC style is rather interesting to write in:
Something like that:
foo: mov (r5)+, r0
add (r5)+, r0
rts r5
...
jsr r5, foo
.word #40
.word #2
;next instr
Imho a bit more interesting than the nth CISC vs. RISC discussion
PS: And while I'm way too young to have actively programmed a PDP11 or anything, I've had some CA lectures and I must say, the PDP11 CISC style is rather interesting to write in:
Something like that:
foo: mov (r5)+, r0
add (r5)+, r0
rts r5
...
jsr r5, foo
.word #40
.word #2
;next instr
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