Info [Toms, Anand] AMD EPYC Benchmarks

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Abwx

Lifer
Apr 2, 2011
10,940
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Just noticed in related news at wich point Digitimes are complete shills and totaly sold out to Intel, going as far as promoting way inferior hardware for 2020-2022 years :

https://www.digitimes.com/news/a20181213RS400.html

That s their alleged report about server market shares and trends they expect for the years to come, on the bottom is an article about Intel s products up to 2022, nowhere i see reference to AMD, and they call this "market trends" up to 2023, so much for a "report" that do not report about the best in class products.

Guess that it will fire back, as with such advices Taiwan OEMs are sure to give up some consistent marketshare not only to mainland China numerous rivals but also to the big names like HPE or Lenovo who have readily available solutions.
 

Atari2600

Golden Member
Nov 22, 2016
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Bloody hell!

I knew Rome would be good... but wasn't expecting a bloodbath.
 

BigDaveX

Senior member
Jun 12, 2014
440
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At least Intel's struggles against the Athlon 64 and original Opteron could be written off as the result of them screwing around with two architectures (Itanium and Netburst) that turned out to be technological dead ends. This time around, AMD have simply massively out-engineered Intel. Even the 56C Xeons are only going to be able to trade blows with Rome rather than outright beating it, and that's not counting the massive price-performance disparity.
 

DrMrLordX

Lifer
Apr 27, 2000
21,620
10,830
136
Whew. That is not pretty for Intel. And the hits just keep coming every year. Intel won't be able to defend themselves until 2021 (Sapphire Rapids), and that thing has to face off against Zen 4. I don't think Cooper Lake is going to help them much.
 

dacostafilipe

Senior member
Oct 10, 2013
771
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116
Intel won't be able to defend themselves until 2021 (Sapphire Rapids), and that thing has to face off against Zen 4. I don't think Cooper Lake is going to help them much.

That's impossible, we have our French ex-Intel that states:

Who said 2.4Ghz at the higher TDP very early? ;-) Right on the dot !

AMD has implemented the same turbo mechanism as Intel Turbo 2.0. At 150Watts, the 64 cores would run at 1.4GHz, somebody can try.

At 2.4Ghz, it is dead on arrival on VMs

So, the 2.4Ghz when running full AVX256 tells you that the 7nm process is going to have a very hard time to compete with the upcoming Xeons 10nm... very very hard time. Icelake and Tigerlake Xeons are going to be dealing with memory a lot better, fusion on micro ops will kick ass

AMD does not have volume to dent any marketshare on their top end design.

In other word, the hard part is to make more than 100 000 per day.

With all the news, across the internet, that praise Epyc ... comments like those above, kinda stick out.
 

fleshconsumed

Diamond Member
Feb 21, 2002
6,483
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And I got snide remarks for saying "how the mighty have fallen" about Intel in one of the earlier threads a few months ago.

Kudos to AMD for besting Intel in their own game. I just hope that corporate customers actually switch to AMD instead of waiting for Intel to counterpunch.
 

Atari2600

Golden Member
Nov 22, 2016
1,409
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Biggest surprise for me was how well it did on AVX512. Thats intels bread and butter and even on software not optimized for Zen2 it did really well.

I think you know, but just clarifying for others - Zen2 doesn't have AVX512 - that is it running unoptimised AVX2 and doing it good enough to equal the optimised Intel AVX512 alternative compilation!
 

Kenmitch

Diamond Member
Oct 10, 1999
8,505
2,249
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Meanwhile a tanker truck full of LN2 is heading towards Intel headquarters. The engineers are determined to beat Rome at all costs!

Will we be seeing an influx of AVX 1024 benchmarks?
 

zir_blazer

Golden Member
Jun 6, 2013
1,164
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32MiB per chiplet, so the 7252 is most likely a 2 chiplet 16c just like the 3950x;
the 7282 most likely a 4 chiplet 16c.

Now, the 7282 can either be 2 cores per ccx, or 1 ccx disabled per chiplet. I like the latter based on latency tests of zen2 core - core from same ccx vs to other ccxs.
Doubt so. Given than with TR AMD was using two usable dies and two failed dies to distribute the heatsink weight (Or something like that), I doubt that they use only two dies cause it would be completely asymetrical. Assuming they're all working dies, I see more probable than the 7282 uses four half-chiplets (Full CCX with full Cache L3, 4+0), which given the fact that CCX are individualized on a chiplet as they have to go though the I/O die anyways, should behave exactly the same than two full chiplets. What worries me is if the 7282 uses something like 4 chiplets as 2+2 with 8 MiB Cache L3 per CCX, then for the 7302 they use 2+2 with 16 MiB Cache L3 per CCX (Full Cache L3 per chiplet, but half the cores). These shouldn't behave the same than the 3950X. To be honest, the 7302 seems rather ugly because there is no possible configuration for it that uses a full 4C CCX and gets to 128 MiB Cache L3 total...
 
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Kenmitch

Diamond Member
Oct 10, 1999
8,505
2,249
136
It's not even doing AVX512, it's running AVX2 vs Intel's hand-tuned AVX512 implementation.

That's pretty crazy when you think about it.

Makes a person wonder at what point in time Frontier would be more powerful than all the computers on Earth combined.
 

DrMrLordX

Lifer
Apr 27, 2000
21,620
10,830
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That's impossible, we have our French ex-Intel

Francois is such a funny guy.

I just hope that corporate customers actually switch to AMD instead of waiting for Intel to counterpunch.

If Intel had a healthy record of process improvements under their belts over the last five years, I think that would be a concern. We still haven't seen high-volume 10nm yet, and nobody knows if 7nm can be delivered on time either. Anyone waiting for a counterpunch will be waiting for a long time.
 
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.vodka

Golden Member
Dec 5, 2014
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It's a bloodbath in all fronts. Was AMD's target server market share for the foreseeable future 10%? I'd even say that's conservative. I'd guess it's hard not to switch platforms with all the cards on the table right now, even if it would require some work to transition for those who are locked in to Intel's platform.

Hope TSMC can keep up making those chiplets because these CPUs will be aggressively flying off the trays.

Francois is such a funny guy.

His meltdown is a pleasure to watch.

He couldn't have been more wrong about Rome.
 

Kenmitch

Diamond Member
Oct 10, 1999
8,505
2,249
136
Just noticed in related news at wich point Digitimes are complete shills and totaly sold out to Intel, going as far as promoting way inferior hardware for 2020-2022 years :

https://www.digitimes.com/news/a20181213RS400.html

That s their alleged report about server market shares and trends they expect for the years to come, on the bottom is an article about Intel s products up to 2022, nowhere i see reference to AMD, and they call this "market trends" up to 2023, so much for a "report" that do not report about the best in class products.

Guess that it will fire back, as with such advices Taiwan OEMs are sure to give up some consistent marketshare not only to mainland China numerous rivals but also to the big names like HPE or Lenovo who have readily available solutions.

Isn't that an old article?

They look to have a incoming article titled " AMD eyeing bigger share of server processor market " for their paid subscribers.
 

Topweasel

Diamond Member
Oct 19, 2000
5,436
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32MiB per chiplet, so the 7252 is most likely a 2 chiplet 16c just like the 3950x;
the 7282 most likely a 4 chiplet 16c.

Now, the 7282 can either be 2 cores per ccx, or 1 ccx disabled per chiplet. I like the latter based on latency tests of zen2 core - core from same ccx vs to other ccxs.
AMD isn't using a 2 chiplet design. It will be 4 or 8. So chances are both are 4 chip designs with one having half the cache harvested.
 
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Yeroon

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Mar 19, 2017
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Doubt so. Given than with TR AMD was using two usable dies and two failed dies to distribute the heatsink weight (Or something like that), I doubt that they use only two dies cause it would be completely asymetrical. Assuming they're all working dies, I see more probable than the 7282 uses four half-chiplets (Full CCX with full Cache L3, 4+0), which given the fact that CCX are individualized on a chiplet as they have to go though the I/O die anyways, should behave exactly the same than two full chiplets. What worries me is if the 7282 uses something like 4 chiplets as 2+2 with 8 MiB Cache L3 per CCX, then for the 7302 they use 2+2 with 16 MiB Cache L3 per CCX (Full Cache L3 per chiplet, but half the cores). These shouldn't behave the same than the 3950X. To be honest, the 7302 seems rather ugly because there is no possible configuration for it that uses a full 4C CCX and gets to 128 MiB Cache L3 total...

You initially stated the 7252 was a 16c and I assumed that was correct. I'm not sure what seems to be confusing you but the core counts and cache make sense at each level to me. (I had it all laid out and the post got eaten)

AMD isn't using a 2 chiplet design. It will be 4 or 8. So chances are both are 4 chip designs with one having half the cache harvested.

There was a leaked list a while back down to 2 chiplets, so I'm wondering if AMD has since stated only 4 and 8 chiplets.
I see no reason they can't do any number of chiplets from 1-8 with the current package, considering am4 uses an asymetrical package with 1 chiplet.
 
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Abwx

Lifer
Apr 2, 2011
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Isn't that an old article?

They look to have a incoming article titled " AMD eyeing bigger share of server processor market " for their paid subscribers.

They are playing catch out, their article date from december 13 2018, Epyc was already 18 months old and Lisa Su s memento at CES 2019 (january..) about Epyc 2 was already announced, dunno what they had in mind, perhaps helping a few "cautious" OEMs to get bankrupted, but being an informative outlet certainly not...

Anyway seems that the big names have much better sight, among other HPE and Lenovo have day one solutions.
 

Topweasel

Diamond Member
Oct 19, 2000
5,436
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You initially stated the 7252 was a 16c and I assumed that was correct. I'm not sure what seems to be confusing you but the core counts and cache make sense at each level to me. (I had it all laid out and the post got eaten)



There was a leaked list a while back down to 2 chiplets, so I'm wondering if AMD has since stated only 4 and 8 chiplets.
I see no reason they can't do any number of chiplets from 1-8 with the current package, considering am4 uses an asymetrical package with 1 chiplet.
Performance scalability and reliability. It's kind a strict on PC. More strict on desktop. There is a reason why the alignment on the CCD are how they are on EPYC. That is to be able to remove a pack of them (4) without impacting cooling and so on. Then look at the 3900 vs. the 3800, with the write speed difference and such. Want the biggest proof. Clocks vs. power usage. These are going to be sub 40w chiplets at such clock speeds even at full boost all cores at that level. Even if we give the IO die a hefty power usage (not sold on). It's still comes below that 120w. So no these are super harvested dies with lots of core defects or cache defects.
 
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AtenRa

Lifer
Feb 2, 2009
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And the FUD has started,

Is AMD Rome burning?
https://fudzilla.com/news/pc-hardware/49183-is-amd-rome-burning

:rolleyes:
I will post the entire article for those that dont want to click to read it,

Updated: Will High voltages on AMD's 7nm Ryzen 3000 plague Rome launch?
Today is the day when AMD plans to launch its 7nm datacenter CPU with up to 64 cores, codenamed Rome. As AMD gets ready for it’s most important launch ever today, there is a lot of anticipation and excitement for newfound competition with Intel. Still, well-informed sources are confirming that the Rome default voltages are exceeding TSMC’s 7nm maximum voltage.
While the Ryzen 7nm desktop launch has had some success to date, the data center is a very different world where power and performance go more hand in hand then on the desktop. I remember when AMD launched its first EPYC in Austin, Texas, there were a lot of promises about potential growth, and now, more than two years later, AMD managed to have very marginal success in the data center sphere.
Rome voltages are higher than TSMC recommends
The desktop Ryzen at 7nm runs at a very high 1.4V which, according to our well-informed sources, exceeds the TSMC spec at 7nm for 1.3V. AMD doesn't seem to think it's a big deal beyond poor overclockability, which, while disappointing to enthusiasts, is not as big of a deal for many mainstream users and gamers.
1.4V to cause problems in the data center
In the data center, this voltage challenge will have to adjust to much lower levels for stability and efficiency for enterprise customers, which will almost certainly impact performance. While AMD will still perform well in several areas, this will limit the headroom it has in increasing performance and power efficiency in the future. The final voltages will tell us a lot overall.
Running above the recommended voltage is a dangerous game, and AMD would certainly love to run at TSMC recommended voltage but could not get the required performance.
The datacenter market is a long-term play. Even though a player might have a better product than a competitor in the current generation, data center deployment and platform are set to last for multiple years. So a rushed decision to swap decades of Intel data center Xeon powered farms with an EPYC won’t happen. Partial deployments of the AMD’s new 7nm Rome based processors will certainly happen, but it won't be as massive as AMD will want you to believe.
AMD Rome has hot voltages
Now with rumors that EPYC Rome needs higher voltages than TSMC likes, that is going to put Rome in the unfavorable position of being able to burn. We of course are pointing to Nero burning Rome analogy here. Just a short reminder - AMD’s Vega was poisoned with bad thermal powers, something that we’ve heard that troubles AMD’s design for quite some time.
With rumors about Lisa's future outside of AMD and potential new CEO Rick Bergman waiting in the wings, the stakes have never been higher for AMD. Rick who we know from his ATI days, would do a great job, just my two cents.

Update: AMD Public relation department sent us the following statement, but if we were not confident, our multiple sources were right, we would not write it in the first place:

The recent article regarding Rome running at unsafe voltages is incorrect. Our 7nm chips are designed and built to operate normally at boost voltages below the maximum identified by TSMC.​
 

Atari2600

Golden Member
Nov 22, 2016
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Also no surprise the FUD spread about Lisa Su leaving AMD too.

Intel in firefighting mode and rolling out the FUDfighters.


When does Tommy Cooper Lake arrive? I suppose I should be able to spot the smoke rising out of data centres when it is first let loose.
 
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