Question Thought Leadership & AMD Vision - removed official AMD presentation

[Evleos]

AMD today posted a video on YouTube named "Thought Leadership & AMD Vision", which was promptly removed a couple of hours later. It was a presentation held towards the end of June or July. I listened to it with half an ear while running after our kid, and I did think that the presenter was far more direct than what's usual from an official presentation. The presentation ran for about 45 minutes and the last five minutes I didn't finish in time - which was on AMD's next rack architecture.

Did any of you see this presentation? Any salient points you picked up on?

Some tidbits I remember:

X86 ISA collaboration
He mentioned that AMD and Intel are collaborating on security, matrix instructions (I think this is new. My previous understanding was that AMD would focus on vector instructions), and something about page size (?).

Zen6
He mentioned that Zen6 had been in the lab for a while, that it was running Linux (I think he just meant that it runs a normal OS), that it was looking extremely good, and that it would easily meet its deadlines. I remember thinking that he said this latter part in a way that implied that AMD could launch it earlier.

CDNA
Mentioned that MI4XX would have two different compute unit dies; one optimized for HPC (more 64 bit), and one optimized for AI (less 64 bit). This isn't news I think.

Foundry
He mentioned that AMD fabs with TSMC, GloFo, and that AMD fabs with Samsung. I didn't know that AMD fabs with Samsung. He also mentioned that AMD would have fabbed with Intel, were it not for Intel's process being so far behind. He really dug into that one.

Other
He also talked about networking, stating how AMD's networking had superior performance in some dimensions. A lot of the presentation was on more standard AMD talking points; performance, openness, execution.

 

[Geddagod]

He also mentioned that AMD would have fabbed with Intel, were it not for Intel's process being so far behind. He really dug into that one.

LOL

 

[soresu]

I didn't know that AMD fabs with Samsung

Probably the Xclipse mobile version of RDNA?

 

[LightningZ71]

There was that attempt at a low end "value" chip.

If they could ever get decent enough yields with reasonable costs, I think AMD and Samsung could get a decent handheld gaming processor out the door. Kraken's CPU side with a 12cu iGPU with a 16MB MALL would neatly split the difference between lackluster Strix Point and the over specced Halo package for decent handhelds.

 

[511]

He mentioned that AMD fabs with TSMC, GloFo, and that AMD fabs with Samsung. I didn't know that AMD fabs with Samsung. He also mentioned that AMD would have fabbed with Intel, were it not for Intel's process being so far behind. He really dug into that one.

That's just taking a shot at it's rival no way Intel is behind Samsung

 

[Tigerick]

SO FAR BEHIND !!!

He is telling the truth, nothing but the truth. I really hope nobody in this forum fall into Intel's fancy marketing terms: Intel is trying to hide the facts that they could launch the chiplet using advanced process to prove the node is working. NO, IT'S NOT especially the competitor is still using monolithic design...

 

[Thunder 57]

That's just taking a shot at it's rival no way Intel is behind Samsung

Until one of them proves otherwise I think of it like this:

1) TSMC
2a) Intel
2b) Samsung

 

[511]

Until one of them proves otherwise I think of it like this:

1) TSMC
2a) Intel
2b) Samsung

Should be
1) TSMC
2) Intel
3) Samsung
Samsung still has to proof their 4nm process yield as well as Intel's and Is as good as it.
OFC no one has a actual working in HVM N3 Class or better process besides TSMC.

 

[511]

SO FAR BEHIND !!!

He is telling the truth, nothing but the truth. I really hope nobody in this forum fall into Intel's fancy marketing terms: Intel is trying to hide the facts that they could launch the chiplet using advanced process to prove the node is working. NO, IT'S NOT especially the competitor is still using monolithic design...

Nice way of AMD to ignore facts

 

[Geddagod]

Should be
1) TSMC
2) Intel
3) Samsung
Samsung still has to proof their 4nm process yield as well as Intel's and Is as good as it.
OFC no one has a actual working in HVM N3 Class or better process besides TSMC.

I mean, there are plenty of external SOCs on their 4nm process.
Tensor G4 and Exynos 2400 for example.
It's also however no where near TSMC's N4 process.
The X4 in the Exynos 2400 and G4 are "only" ~30% larger not counting the L2 SRAM array vs the same X4 on N4P on the mediatek 9300, while all the cores have similar Fmax.
Perf/watt wise, the Mediatek (TSMC) X4 is <15% better at ~4.5 watts. This power point is at ~87% the Fmax of the X4.

Intel 4 on RWC is ~40% larger than Zen 4 using the same metric. They have the same Fmax on mobile, but esentially the same core on the same process can clock much, much higher on desktop. It's unknown if Intel can achieve those same frequencies on their own nodes.
At ~87% the peak perf of RWC, the gap in perf/watt is ~10% vs Zen 4 mobile.

I think Samsung has a comparable node here, even accounting for the fact that RWC is architecturally not as good as Zen 4. I still think it's worse, but at best a sub node's worth of a difference.

And while Intel has Intel 3 out, Samsung is shipping 3GAP in HVM as well. While we don't have power or area curves for the Exynos 2500 (or ARL-U for that matter), I doubt 3GAP isn't at least as good as Intel 3, if not better, since it's on paper much better. Which- before anyone says anything- is not the case for Intel 4 vs Samsung 4nm lol.

 

[511]

mean, there are plenty of external SOCs on their 4nm process.
Tensor G4 and Exynos 2400 for example.
It's also however no where near TSMC's N4 process.
The X4 in the Exynos 2400 and G4 are "only" ~30% larger not counting the L2 SRAM array vs the same X4 on N4P on the mediatek 9300, while all the cores have similar Fmax.
Perf/watt wise, the Mediatek (TSMC) X4 is <15% better at ~4.5 watts. This power point is at ~87% the Fmax of the X4.

These are ARM cores and same architecture

Intel 4 on RWC is ~40% larger than Zen 4 using the same metric. They have the same Fmax on mobile, but esentially the same core on the same process can clock much, much higher on desktop. It's unknown if Intel can achieve those same frequencies on their own nodes.
At ~87% the peak perf of RWC, the gap in perf/watt is ~10% vs Zen 4 mobile.

This is not the same architect not even close can you really say this that outside of IPC these have anything in common.

think Samsung has a comparable node here, even accounting for the fact that RWC is architecturally not as good as Zen 4. I still think it's worse, but at best a sub node's worth of a difference.

And while Intel has Intel 3 out, Samsung is shipping 3GAP in HVM as well. While we don't have power or area curves for the Exynos 2500 (or ARL-U for that matter), I doubt 3GAP isn't at least as good as Intel 3, if not better, since it's on paper much better. Which- before anyone says anything- is not the case for Intel 4 vs Samsung 4nm lol.

Are they shipping 500+ mm2 sq dies? On these nodes?
TSMC is shipping near reticle size on N5/N4
Intel is shipping ~598mm2 GNR dies
Samsung is shipping 17mm2 Galaxy watch dies 🤣 or 100-125mm2 Mobile SoC.

 

[Geddagod]

These are ARM cores and same architecture

This is not the same architect not even close can you really say this that outside of IPC these have anything in common.

Unless you think Intel's architecture and physical design team are so bad that they can create a an entire node jump's worth of differences, from a core that has both the same IPC and just as important the same Fmax, Intel 4 and Samsung 4nm are roughly comparable, yes.
And we also know the difference isn't that bad, because in the area department at least, SNC was not that bad vs Zen 3 either.

Are they shipping 500+ mm2 sq dies? On these nodes?

You don't need to be shipping 500+mm2 sq dies to have "good" yields on those nodes.
Not many customers even ship dies that large anyway. And the ones that do want to use the leading edge, so Samsung really doesn't have much of a chance to fab those chips anyway.
Intel 4 is actually only shipping comparable die sizes to those mobile SOCs too, and yet that didn't stop Intel from claiming Intel 4 has great yields, nor did that stop anyone (including me) from believing those claims either.

 

[511]

Unless you think Intel's architecture and physical design team are so bad that they can create a an entire node jump's worth of differences, from a core that has both the same IPC and just as important the same Fmax, Intel 4 and Samsung 4nm are roughly comparable, yes.
And we also know the difference isn't that bad, because in the area department at least, SNC was not that bad vs Zen 3 either.

They substantially increased the area in Golden Cove though and this is the P core team look at the E core team they improved the core while reducing the area P core team reduced the area but also performance a bit.

You don't need to be shipping 500+mm2 sq dies to have "good" yields on those nodes.

Ok but it is a testament to process yield as well.

Not many customers even ship dies that large anyway. And the ones that do want to use the leading edge, so Samsung really doesn't have much of a chance to fab those chips anyway.

I agree here especially mobile customers.

Intel 4 is actually only shipping comparable die sizes to those mobile SOCs too, and yet that didn't stop Intel from claiming Intel 4 has great yields, nor did that stop anyone (including me) from believing those claims either.

Intel 4/3 is the same PDK their segmentation is kind of weird sometimes it is P1276 for both .

 

[adroc_thurston]

Nice way of AMD to ignore facts

Lmao dude they have PDK access.

 

[511]

Lmao dude they have PDK access.

Ofc but Intel's PDK are not for faint of heart 🤣🤣.
The design rules are bad

 

[adroc_thurston]

Ofc but Intel's PDK are not for faint of heart 🤣🤣.
The design rules are bad

Well no, 18A has a normal ass PDK.
Just that the node itself is very-very meh.

 

[511]

Well no, 18A has a normal ass PDK.

That is the external one. Internal one has difference quit a lot that can affect PPA.

Just that the node itself is very-very meh.

No for this

 

[adroc_thurston]

That is the external one

I don't think Intel uses a bespoke one.

No for this

You know well enough that a whole pile of IHVs evaluated 18A and ditched it.

 

[511]

don't think Intel uses a bespoke one.

The do have one for internal separate from what was shared

 

[adroc_thurston]

The do have one for internal separate from what was shared

Obviously, but Intel design teams were moved to industry standard tooling so any acceptable PDK would be conformant nuff.

 

[511]

You know well enough that a whole pile of IHVs evaluated 18A and ditched it.

Ofc I know that most of them complained too much about PDKs missing stuff and horrible libraries and what not lol.

 

[511]

Obviously, but Intel design teams were moved to industry standard tooling so any acceptable PDK would be conformant nuff.

Yup but the there can be two different pdk for industry standard tooling

 

[adroc_thurston]

Ofc I know that most of them complained too much about PDKs missing stuff and horrible libraries and what not lol.

18A lacks some LP stuff until 18A-P but nothing that would stop AMD or NV from building performance stuff. But they didn't.

 

[511]

18A lacks some LP stuff until 18A-P but nothing that would stop AMD or NV from building performance stuff. But they didn't.

Except for the fact that they don't want to or TSMC giving them a scare.
Conflict of interest and for AMD it will lead to revival of it's rival same for Nvidia.

 

[adroc_thurston]

Except for the fact that they don't want to

But everyone likes cheaper just-as-good nodes.

TSMC giving them a scare.

They can't. HPC is their only really growth driver so scaring the hoes there is a bad idea. They know it.