Originally posted by: fkloster
We are not talking about current DDR platforms here. We are talking about the up and coming Granite Bay, which will undoubtedly have all the tricks of the 850E such as buffering and pre-fetching applied to a Dual DDR system.
Ummm, in fact,
WE WERE commenting on what Ilmater had said ( "Considering that currently DDR has lower latency," ...Ilmater) about "current DDr" platfroms were performing like. You took my statement out of context.
I could care less what is said about rimm latency in the FAQ, the bottom line is that in real worlds performance, rimm latency is not an issue, and hopefully won't be with future DCDDR implementations.
Oh, I see, now suddenly the story changes. As I was a part of the conversation, I'm quite sure that
WE WERE talking about whether or not RDRAM has higher latency, not whether or not it shows up in real world performance. As I said before, plain and simple, RDRAM has a higher latency than DDR. Period. You first stated:
I believe the latency would be worse for DCDDR than rimms.
Indeed, this is not the case with current DDR. The latency of DDR is
not worse than that of RDRAM. That's why I said what I said in the first place. And, if you look back to the original comment:
My guess is that DC DDRRAM has lower latency than RDRAM, thus the performance advantage. Thats why I'm holding off upgrading my PC800 RDRAM.
... you'll see that he was clearly speaking about latency as well. Now, you could have made the claim that because of prefetch and other optimizations, the performance difference isn't there, but you know that our answer would be that they could use the same technologies with DCDDR memory controllers (see RanDum72's comment), effectively giving them both their better latencies as well as prefetch and buffering. There's no reason not to. Before, Intel was so concerned about bandwidth (and rightfully so, as their procs are very bandwidth hungry) that they were willing to stick with RDRAM and find other ways to get around latency troubles. Now that DCDDR will equal RDRAM in bandwidth, Intel will use the lower latency of DDR, along with prefetch and buffering, to further space DCDDR ahead of Rambus. Which is why, I believe, Intel has stopped talking about RDRAM and have made some indications that it will not be running their high-end systems at least by next year at this time, if not sooner.
Fallacy? What fallacy? It looks like a fact to me.
Now, your point about the complicated timing schematics could be very correct, but that remains to be seen. Is working pairs the reason for the low latencies present in RDRAM today? Maybe. I'd be interested to know if that was the case, or if it was, rather, an issue with the RIMM interface or just in the nature of the way RDRAM chips work. When all's said and done, the most important fact is that we simply don't know, and anything we say is just conjecture for now.