I'd love to see you substantiate that claim with real evidence and information.
Byte-aligned instructions mean that either you limit yourself to one or at most two decoded instructions per clock, or you pay a high toll on power as your frontend needs to be an ungodly mess of muxes. Just keeping all the present semantics of the instruction set, losing the prefix bytes and redesigning the opcodes for 2-byte aligned instruction set would make x86 much more power-efficient, with minimal code size penalties. And you could claw back the code size by losing some of the old instructions that no-one has used for decades. None of that is controversial in the slightest.
ARM is great for battery life, but in terms of performance ARM chips will never compare to intel offerings.
For the foreseeable future, I completely agree. The point is, it's not about the instruction set. In terms of speed and power, x86 is a liability. It's just that it's main asset, backwards compatibility for more than 3 decades, has bought Intel the resources to do better despite it's drawbacks.
x86 was never designed to be a high-performance isa. It was originally meant for pocket calculators and running traffic signals and the like. After that, the primary consideration has been adding useful features while preserving backwards compatibility.
For a isa that was originally designed for speed, look at Alpha and Power. Their design makes it easier to build wider and faster cpus. When they were designed, a lot of people believed they would win over x86 because of their inherent advantages for speed. Instead, Intel showed us that when you have the most money to pour into the fabs, and the most money to hire all the best designers and engineers, the differences between isas are not that significant. Having a lead on the process tech and having better uarch buys Intel the opportunity to keep using a crappy isa, and still having the faster cpus than the competition.