The 64 bit question?

[Accord99]

Originally posted by: Matthias99

I don't really want to get into a pissing contest over this. As best as I can find, the P4 has 8 32-bit GPRs, 8 80-bit x87 registers, 8 64-bit MMX registers, and 8 128-bit SSE1/2 registers. I'm not sure whether or not 8 is in the "huge" range 😛. I also thought that the SSE registers couldn't be used directly for non-SSE floating-point operations (something like you couldn't have it be both source and destination for an FP op, but maybe that's only while you're using MMX or SSE1/2). If I'm wrong here, or you have better info, please point me towards a technical document or something, as I'm somehow not having much luck finding anything useful with Google right now.

Sorry, I was refering to the invisible rename registers, which are not directly accessible by programmers. In addition to the registers you've mentioned, the P4 also has 128 32-bit GPRs and 128 128-bit registers for FP/SSE2. The K7/K8 has about 88 of each I believe (except the FP/SSE2 registers are 80-bit only)

See:
http://www.chip-architect.com/news/2003_04_20_Looking_at_Intels_Prescott_part2.html

Opteron extended registers:
http://www.tomshardware.com/cpu/20030422/opteron-06.html#a_big_deal_opterons_64bit_registers

Will it translate to better FPU performance? Double the GPRs, with each able to hold a 64-bit float if necessary -- along with twice as many SSE1/2 registers. I would think that performance with double precision floats in 64-bit mode would be significantly better, although by how much I couldn't tell you without benchmarks and/or more info on the rest of the floating point architecture.

The additional registers should boost performance. However, its dependent on the code, whether a programmer is willing to go to assembler and the maturity of compilers. Even now, Intel's compiler typically produces faster FP code than ones targetted at x86-64 for K8 processors. I've heard estimates of 5-10% improvements in general. Also, I don't think there's any way to get data directly from a FP register to a GPR in any x86 CPU, without writing to memory first.

Considering that SETI is pretty much nothing but FFTs and other forms of analog signal processing, I would think it would have a *lot* to gain from a 64-bit architecture if it significantly improves FPU performance. But unless you have the source code handy, it's really just speculation at this point.

FFTs seem for now, to be clearly superior on the P4. Prime95 is heavily FFT based and extremely well-optimized and the P4 has significantly better performance per clock at the moment.

Will 64-bit desktop computing pan out? I have no idea -- and neither does anyone else, really. If it significantly improves performance in real-world applications and the specialized fields that can use it (and we'll have to wait for 64-bit Windows next year to tell) at a minimal cost, then it will. If it does nothing but cost more, then it probably won't. 😛 We'll have to see what happens when Intel gets Prescott rolling -- a (hopefully) mature, super-fast 32-bit processor versus an unconventional, untested 64-bit newcomer. It ought to be fun to watch. 🙂

Well, I'm sure that 64-bit computing is the future, just that for desktop purposes, it's still not necessary for a several more years, as long as Intel's 32-bit performance matches AMD's 64-bit performance in the same applications. And yeah, I'm anticipating the Prescott, primarily to see how its bigger caches impact Hyperthreading performance.

 

[zephyrprime]

Being able to do 64-bit floating-point calculations in a larger register set could provide a noticeable performance boost for many applications. Double-precision floats are *slow* in a 32-bit architecture, since they have to be packed/unpacked from 32-bit words

As Accord99 has already stated, this isn't true. (And I thought the P4 has 256bit cache lines?) The new A64 doesn't even have a bigger register set for FP. It's still just 8 registers for some reason. But the register file is now flat not a stack as it is in the conventional x87.

Also, I don't think there's any way to get data directly from a FP register to a GPR in any x86 CPU, without writing to memory first.

there is but you'd have to use mmx which doesn't preserve the FP'ness. movd

 

[OddTSi]

Originally posted by: JustAnAverageGuy
It was also once said that nobody would need more than 640k of memory. Better early than last minute.

I rest my case 🙂

You rest your case on yet another myth?

Bill Gates
never
said that

Originally posted by: dguy6789
Sir, at the speed computers advance (which is also increasing) 4GB of ram will be what 32MB is today 3 - 4 years from now.

It's generally agreed upon that RAM usage doubles roughly every two years (in fact I think I saw some mention of that in one of the 3 articles I linked to above). Seeing as how 512MB is fairly common today, and 1GB is not quite yet the norm, that means it's probably 5-6 years until 4GB of RAM is the norm. It won't be for another ~8 years past that (so 13-14 years from now) that 4GB of RAM will be to everyone what 32MB of RAM is to everyone today. You're off by about a decade.

Originally posted by: menads
Where you are completely wrong (or spreading FUD) is you part about Xeon and business users. Yes it is true that Xeons support more than 4GB but you somehow forgets to metion how this memory is used - in order to be used you need both PAE (Physical Adress Extensions) and AWE (Adress Window Extensions) and let me tell you as a database developer that paging SUCK$.
...snip...
And finally you are making a bold claim as how in next five years home users will not need 4GB (actually it is 2GB per process to be correct) but let me ask you - how do you know how much memory next wave of applications are going to use?

For the first part of your statement, yes, Xeon memory addresibility isn't really efficient above 4GB, but that was never my point, nor was it yours. You said in your post that it was not possible to have above 4GB, I provided a counter-argument saying that it WAS possible with the Xeons. If when you said that it wasn't possible you meant to say "it's not possible to do it efficiently" then you should've said so.

As for the second part of your statement, read what I said above, RAM usage doubles roughly ever 2 years (stop and look back where computers have been for the past decade or so and you will see that this is not just a theory but is a pretty accurate assessment).

People make posts saying that 4GB will be needed in the next year or two, and that Intel is spreading lies when they said that 64-bit processors won't be needed on the desktop until at least 5 years from now. The whole point of my first post was to say that this is NOT true. It'll be 5+ years until 4GB of RAM will be needed (for the average user) and Intel's statement (marketing speak or not) is TRUE. Don't take this to mean that I think we should sit around until then before upgrading to 64-bit computers. I think in the next year or two Intel/AMD should start the migration towards 64-bit so that when the need arises people have already upgraded. But until that time (the 5-6 year mark) 64-bit processors will NOT be NEEDED by the average user like some of the AMD fans around here have been saying, they will simply be a forward looking upgrade (which is a good thing).