Actually, every chipset from all the makers for like the past 2 or 3 years has had the Ethernet controller integrated in the southbridge, bypassing the PCI bus. Previous to that, the southbridge was actually running on the PCI bus itself, rather than the PCI bus being controlled by the south bridge separately from everything else.
If the motherboard maker used the chipset-integrated Ethernet controller, then in most cases it will bypass the PCI bus; I think some chipsets allow you to specify in the CMOS setup whether to put it on the PCI bus or not, but for the most part that's not an option.
If they used an add-in chip such as a Broadcom controller or an Intel Gigabit controller, then the chip is wired into the PCI bus in the same way that a PCI card controller would be.
If the board uses the integrated controller, then it does also need an external PHYceiver (such as the RealTek RTL8201L) which is the physical conversion chip, changing the data from the electrical signals on the board, to the signal used on an Ethernet cable. The integrated Ethernet controller is still the actual controller, and therefore is not affected by the PCI bus.
That Intel page doesn't really say that the Gigabit controller will be integrated in the northbridge. What that chip is, is actually a separate Ethernet controller chip with a new interface standard, which instead of being mounted on a PCI adapter card, would be mounted on another type of card, which fits in a slot with a dedicated connection to the northbridge (similar to how an AMR or CNR slot has a dedicated link to the southbridge rather than being a PCI connection). Alternatively and probably the only likely way, would be for it to be integrated on a motherboard like current external on-board controllers are, but wired to the CSA interface of the northbridge.
Intel is really the only company still making chipsets that need to have the GigE Ethernet controller or SATA attached or integrated with the northbridge. VIA's V-Link is currently at 533MBps, and SiS's MuTiol is 1GBps. Intel's hub architecture is still at 266MBps between the north and southbridge.
266MBps is only just enough to carry GigE full-duplex, assuming the two ran at full theoretical throughput rates -- if they put GigE into the southbridge, there'd be no bandwidth for anything else. Intel is also the only one who needs to segment their chipsets so much into server/power and consumer versions. If they integrated GigE into the southbridge, they'd have to produce a separate version of it for consumers (cheaper) with only 10/100 integrated. Rather than do that, they can interface it directly to the northbridge, and continue using the same version of the southbridge for high and low-end chipsets. (Springdale and Canterwood seem to be the first with CSA capability, but only the high-end versions will have CSA.)
SerialATA of course also adds a kink. Although a single drive can't stream data as fast as 150MBps, a drive with a large cache can burst near those speeds. Put in 2 or 4 port support, and the link between the chipsets isn't nearly enough to allow full through-put even just with all the drives streaming, let alone bursting. (I'd imagine that Intel's design is already a bottleneck with some Ultra320 SCSI setups.) Intel's SATA implementation may not be very good at first, unless they increase the IO-Hub interface speed.
Integrating things into the Northbridge of course does reduce latencies in many cases, but depends on exactly what is being done. CPU to GigE would benefit, but if the data is being stored to the hard drive and the drive controller is still on the southbridge or a PCI/PCI-Express bus, then the IO-Hub speed is still a bottleneck. Even a 4-drive SATA striped RAID array can't keep up with full-duplex GigE, so true performance matching would require an Ultra320 SCSI connection, so we're back to the IO-Hub bottleneck. For some reason, Intel still isn't increasing the speed of the Hub-Link design, even though the striped SATA RAID support of ICH5 will be enough to flood it.
VIA is only slightly better off. They could integrate GigE as well as 2 ports for SATA, but it would still slightly exceed the V-Link bandwidth of 533MBps. I expect they'll move to the next version of V-Link pretty soon.
SiS of course could integrate a couple of GigE controllers and 3 SATA ports into the southbridge and still have a little bit of bandwidth left over, and they certainly aren't standing still making new chipsets (even if they do take awhile to be available). We can only hope Intel lets them make 800MHz bus chipsets, and that the license is done soon enough that we don't have to wait around for chipsets based on it.
As an answer to the question, if the onboard NIC uses the chipset's controller, it can theoretically be faster, and it will avoid slowing down other devices on the PCI bus. If it uses an add-in chip integrated on the motherboard, then it's exactly the same as a PCI adapter.