- Oct 14, 2003
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"Inspired" by this thread: http://forums.anandtech.com/showthread.php?t=2198488
First, what is Ivy Bridge, and what new things does it bring?
-22nm "Tick" successor to the Sandy Bridge microarchitecture
-Increased Instructions Per Clock(IPC), better power management, security, and revamped graphics
-Insider abbreviation is IVB in case people are curious.
Right now I want to talk about mobile version of Ivy Bridge. Changes were revealed at IDF, so I won't go deeper into that. The focus here is TDP and clock speeds, along with "configurable TDP".
Power management
It might just seem like marketing for Turbo Mode and Speedstep. There are real differences though. Before I go over that, we need to understand other power management related technologies first.
-C and P states
Let's take a mobile Core 2 chip. Modern chips have what's called P and C states. It has C states 0 through 6, and few P states as well. Let's assume P states are 0 to 5. In both of them, the higher the number, the higher the power consumption and better the performance(or the impact on performance is less). The difference between C and P states? P states are a state between minimum active state and maximum clock speed. C states show how deeply in idle power saving mode the CPU is. C0 is the highest C state, and P0 is the highest P state. The OS manages P and C states, and asks the CPU what it wants.
-Turbo Mode/Turbo Core
When the CPU reaches the highest P state, P0, its at the highest "base clock speed". Then it can reach what's called Turbo. Beyond the reach of the OS, the CPU can ramp up beyond P0 clocks for higher performance.
-TDP(Thermal Design Power/Thermal Design Point)
TDP is what the designers of laptops take as a measure of how they should cool the CPU. P0, or P0 at base clocks are what the TDP numbers are designed for, and what the system builders aim for.
Configurable TDP
Configurable TDP is a new feature in Ivy Bridge. The CPU has number of "base clock" points it can reach upon. The implementation can be static, or dynamic, based on IDF Fall 2011 presentations. The important point is that it has some what of a flexibility for builders/designers of systems. That said, let's look at Ivy Bridge in its mobile version. So far, here's what we know. The numbers are from Anand's IDF reports.
TDP Low-13W
TDP Nominal-17W
TDP High-33W
There's another one, which is an Extreme Edition version.
TDP Low-45W
TDP Nominal-55W
TDP High-65W
And apparently, yet another version, with 35W base TDP quad core. Perhaps like this?
TDP Low-25W
TDP Nominal-35W
TDP High-45W
I believe, that'll be the 3 new power points for Intel Ivy Bridge mobile chips. If you ignore that there are multiple points, its actually simplified, for both looking at specifications and the designers(really, it only makes it complicated for me, cause more needs to be typed). You just aim for the power and the base clocks you want. More importantly, it addresses ALL of the required power SKUs for the market.
My guesses on clocks for the fastest 17W Nominal chip. Feel the power of (speculated ) 22nm!:
TDP Low-13W
Base-2.07GHz
Turbo 2 core-2.4GHz
Turbo 1 core-2.8GHz
TDP Nominal-17W
Base-2.83GHz
Turbo 2 core-3.26GHz
Turbo 1 core-3.40GHz
TDP High-33W
Base-3.46Hz
Turbo 2 core-3.73GHz
Turbo 1 core-3.90GHz
(Extrapolation from 32nm/22nm curve graphs, which were surprisingly accurate for 32nm. IMO there's a good chance that it might be ~5% lower than what I put above)
Why do I think of such big boosts?
Its not as big as it looks initially. It's only big on the lower power parts. Exactly what 22nm Tri-Gate transistors promise to do. Why is it so important?
Ultrabooks.
First, what is Ivy Bridge, and what new things does it bring?
-22nm "Tick" successor to the Sandy Bridge microarchitecture
-Increased Instructions Per Clock(IPC), better power management, security, and revamped graphics
-Insider abbreviation is IVB in case people are curious.
Right now I want to talk about mobile version of Ivy Bridge. Changes were revealed at IDF, so I won't go deeper into that. The focus here is TDP and clock speeds, along with "configurable TDP".
Power management
It might just seem like marketing for Turbo Mode and Speedstep. There are real differences though. Before I go over that, we need to understand other power management related technologies first.
-C and P states
Let's take a mobile Core 2 chip. Modern chips have what's called P and C states. It has C states 0 through 6, and few P states as well. Let's assume P states are 0 to 5. In both of them, the higher the number, the higher the power consumption and better the performance(or the impact on performance is less). The difference between C and P states? P states are a state between minimum active state and maximum clock speed. C states show how deeply in idle power saving mode the CPU is. C0 is the highest C state, and P0 is the highest P state. The OS manages P and C states, and asks the CPU what it wants.
-Turbo Mode/Turbo Core
When the CPU reaches the highest P state, P0, its at the highest "base clock speed". Then it can reach what's called Turbo. Beyond the reach of the OS, the CPU can ramp up beyond P0 clocks for higher performance.
-TDP(Thermal Design Power/Thermal Design Point)
TDP is what the designers of laptops take as a measure of how they should cool the CPU. P0, or P0 at base clocks are what the TDP numbers are designed for, and what the system builders aim for.
Configurable TDP
Configurable TDP is a new feature in Ivy Bridge. The CPU has number of "base clock" points it can reach upon. The implementation can be static, or dynamic, based on IDF Fall 2011 presentations. The important point is that it has some what of a flexibility for builders/designers of systems. That said, let's look at Ivy Bridge in its mobile version. So far, here's what we know. The numbers are from Anand's IDF reports.
TDP Low-13W
TDP Nominal-17W
TDP High-33W
There's another one, which is an Extreme Edition version.
TDP Low-45W
TDP Nominal-55W
TDP High-65W
And apparently, yet another version, with 35W base TDP quad core. Perhaps like this?
TDP Low-25W
TDP Nominal-35W
TDP High-45W
I believe, that'll be the 3 new power points for Intel Ivy Bridge mobile chips. If you ignore that there are multiple points, its actually simplified, for both looking at specifications and the designers(really, it only makes it complicated for me, cause more needs to be typed). You just aim for the power and the base clocks you want. More importantly, it addresses ALL of the required power SKUs for the market.
My guesses on clocks for the fastest 17W Nominal chip. Feel the power of (speculated ) 22nm!:
TDP Low-13W
Base-2.07GHz
Turbo 2 core-2.4GHz
Turbo 1 core-2.8GHz
TDP Nominal-17W
Base-2.83GHz
Turbo 2 core-3.26GHz
Turbo 1 core-3.40GHz
TDP High-33W
Base-3.46Hz
Turbo 2 core-3.73GHz
Turbo 1 core-3.90GHz
(Extrapolation from 32nm/22nm curve graphs, which were surprisingly accurate for 32nm. IMO there's a good chance that it might be ~5% lower than what I put above)
Why do I think of such big boosts?
Its not as big as it looks initially. It's only big on the lower power parts. Exactly what 22nm Tri-Gate transistors promise to do. Why is it so important?
Ultrabooks.
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