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Skylake SKU

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Fjodor2001 said:
I agree. And also, Broadwell should have 16 CPU cores and Cannonlake 32, since Sandy Bridge had 4.

Sure, the cores have gotten a bit fatter due to uArch changes, but it should at least be 8-12 CPU cores for Broadwell and 16-20 for Cannonlake.
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That is the biggest non sequitur I have ever read.
 
III-V said:
That is the biggest non sequitur I have ever read.
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Because?

According to Moore's law, we should have double the amount of transistors every 18 months. Hence everything on the die can double in "transistor consumption". I.e. GPU cores, CPU cores, etc.
 
Fjodor2001 said:
Because?

According to Moore's law, we should have double the amount of transistors every 18 months. Hence everything on the die can double in "transistor consumption". I.e. GPU cores, CPU cores, etc.
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According to the law of people buying cheap junk the number of transistors actually used in design for mainstream products will be vastly less than what Moore's law theoretically allows.
 
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Fjodor2001 said:
Because?

According to Moore's law, we should have double the amount of transistors every 18 months. Hence everything on the die can double in "transistor consumption". I.e. GPU cores, CPU cores, etc.
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But power consumption won't halve and the number of usable CPU threads won't double either.
 
kimmel said:
According to the law of people buying cheap junk the number of transistors actually used in design for mainstream products will be vastly less than what Moore's law theoretically allows.
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So the law of people buying cheap junk in practice killed Moore's law... 🙂
 
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kimmel said:
Moore's law says for a given area the density will double it says nothing about how big the area will be. The mainstream market wants cheaper devices.
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According to Wikipedia it says "the number of transistors on a dense integrated circuit doubles approximately every two years.".

It can be interpreted as a that the circuits are just getting more dense. But it could also be interpreted as that the number of transistors on actual chips should increase by the rate indicated.

I think the latter is more correct. Because surely we would not consider Moore's law to be fulfilled if we following 14 nm could produce 10 nm dies with twice the density, but where the dies were so small that they could actually hold less total number of transistors compared to on 14 nm.

Also from Wikipedia:
800px-Transistor_Count_and_Moore%27s_Law_-_2011.svg.png
 
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Fjodor2001 said:
According to Wikipedia it says "the number of transistors on a dense integrated circuit doubles approximately every two years.".

It can be interpreted as a that the circuits are just getting more dense. But it could also be interpreted as that the number of transistors on actual chips should increase by the rate indicated.
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If you read Moore's paper from 1965, you'll see that it has everything to do with cost per transistor, it's an economical law. Moore's Law exists because transistors can continually be made smaller, which directly impacts the price per transistor. That this trend is used to make faster chips is just a mere coincidence with the fact that Moore's Law coincides with Dennard's Law which says that smaller transistors are better, and better chips enable a higher market share, which reinforces the drive to follow Moore's Law.

If there isn't a need for higher performing devices but instead of less power hungry ones, Moore's Law will be used to follow that trend instead because that's where the market (money) forces you to go.
 
Ok, then I think the Wikipedia article on Moore's law should be updated, because that's not obvious from reading it.
 
In markets like GPUs where people don't care about power, the law holds nicely, but it doesn't have to. The only way to increase transistors and decrease the price of them is through node shrinks. So they can ~double every new process node, but it isn't a required part of Moore's Law. You can also compensate through higher volumes, for example.
 
Fjodor2001 said:
Ok, then I think the Wikipedia article on Moore's law should be updated, because that's not obvious from reading it.
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This the data upon which Moore originally published and based his observations:
Graph1.png


What Moore noticed, and was correlating to a log-linear fit, was the the minimum in the price/component (xtor) curve decreased over time (that is the top graph) while simultaneously moving to the right (the number of xtors per IC).

This meant that while the price minimum decreased year after year, the price minimum also required the IC to have higher and higher number of components so as to enable that price minimum. (the bottom curve)

What makes this be the case is that there are competing cost efficiencies involved in any IC design in regards to die-size, development cost, and manufacturing yields.

Graph3.png


This results in a range of chip sizes that are acceptable for making profit on any given node:
Figure5.png
 
mikk said:
Haswell and Ivy Bridge @desktop were all classified with a 95W TPD in early Roadmaps as well, look how it turned out in the end.
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Thanks mikk (and others). I'm just glad the top bin didn't stop @ 65W TDP - I would have been a bit worried then. If I pass on HW-E, it will be for higher ST throughput - though it sucks that SKL-K will be pushed out so far 🙁 My platform is getting old - didn't expect to run a decent overclock this long.
 
Fjodor2001 said:
I think it's not the specific TDP number that is interesting, but that 4+4e has lower TDP than 4+2. All TDP numbers taken from the same slide.
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If a company's decision doesn't quite makes sense, its because its a business(money) decision.

Segmentation, nothing else. Notebooks sell for a higher price, so they see that as a more premium segment, therefore better chips. It's not like its new, look at Haswell. GT3e 45W for mobile and GT2 84W for desktops.

Why do you think Atom performs less than Core?

But you forgot that there's a shrink between those 2, which would come out as 65W. And without more EUs it's hard to imagine why there would have to be a SKU with 1.5x the TDP.
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See my reply to Fjodor2001 above.
 
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Increasing the number of EUs is not the only way Intel can strengthen their iGPU. We do not have the clocks and exact TDPs, so it is entirely possible they have been able to extract more performance by simply clocking the iGPU higher than before.

Then there is the fact that Intel could have designed all new EUs. We have seen in past how nvidia and AMD have been able to gain significant performance by making arch changes. No reason to assume that the current Intel iGPU EU -which can be traced back to Sandy Bridge- is the ultimate evolution. If anything, it is likely quiet immature design, and the lessons learnt over the past few years should allow Intel to design a far more powerful EU for the iGPU. So they can still increase performance without increasing the number of EU.

I would not be concerned about iGPU. Intel know this is one area they are behind AMD, and have been making steady improvements with each generation to close that gap.
 
@Idontcare

Great post.

meloz said:
Increasing the number of EUs is not the only way Intel can strengthen their iGPU. We do not have the clocks and exact TDPs, so it is entirely possible they have been able to extract more performance by simply clocking the iGPU higher than before.
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Not plausible. Iris Pro is already clocked at 1.3GHz.

Then there is the fact that Intel could have designed all new EUs. We have seen in past how nvidia and AMD have been able to gain significant performance by making arch changes. No reason to assume that the current Intel iGPU EU -which can be traced back to Sandy Bridge- is the ultimate evolution. If anything, it is likely quiet immature design, and the lessons learnt over the past few years should allow Intel to design a far more powerful EU for the iGPU. So they can still increase performance without increasing the number of EU.
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Sure, but 14nm allows for much more EUs than only 1 more slice, certainly if they reduce eDRAM to 64MB.
 
Skylake EUs could differ from Broadwell. Theoretically bigger and more powerful. At least there is a 50% addition for GT4. It will be interesting to see a comparison between Broadwell and Skylake GT2 because they have both 24 EUs.
 
All the Skylake SKUs seem to be for mobile. Will there be a Skylake-K? Saw elsewhere Skylake-S will be delayed until Sept/Oct, can we expect the desktop version after that? Which of the SKU will be used for desktops? S?
 
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Seems to confirm the 95W TDP SKU. Also confirms removal of FIVR (I'm still baffled by that).

Source?
 
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