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Skylake Core Configs and TDPs

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Its shown before that Intel adds and removes technology with different uarchs. Specially when its deemed as trials. Hyperthreading was a good example. It was skipped from Core 2, because they couldnt get all the results from Hyperthreading before Core 2 was in a locked phase.

The same applies with the FIVR. Hence the reemerge in Icelake since its deemed a success.

The (F)IVR as a concept was first demoed in 2005 on a Pentium-M.

But the NetBurst->Core uArch was such a big leap that it is not really comparable I think. I.e. I can understand why they did not have time to add or evaluate HT on the first Core uArch in time. Especially when under pressure to release a completely new uArch from the success of AMD at the time.

Or do you think the uArch change from Haswell/Broadwell -> Skylake or Icelake is as big? I find it strange that they should not be able to add IVR on Skylake in time if they wanted to.

I've heard others mention that there are drawbacks with IVR too, like making it harder to reach high clock speeds and that it also is costly. Whether those claims are true or not I don't know for sure though.
 
But the NetBurst->Core uArch was such a big leap that it is not really comparable I think. I.e. I can understand why they did not have time to add or evaluate HT on the first Core uArch in time. Especially when under pressure to release a completely new uArch from the success of AMD at the time.

Or do you think the uArch change from Haswell/Broadwell -> Skylake or Icelake is as big? I find it strange that they should not be able to add IVR on Skylake in time if they wanted to.

I've heard others mention that there are drawbacks with IVR too, like making it harder to reach high clock speeds and that it also is costly. Whether those claims are true or not I don't know for sure though.

Core 2 wasnt new as such. It was an evolution of Pentium-M.

And FIVR is cheaper, not more costly.

Its funny to hear drawbacks about the FIVR and clock. Yet Intel on a 22nm process just released a 4Ghz 4790K with a 4.4Ghz turbo. Thats +500Mhz vs the one (IB) without FIVR.
 
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why 128mb of edram for BGA and 64Mb for LGA?? It doesnot make sense to do that, expcially since desktop requires more performance and has the cooling/power to deliver it
 
Is there any actual confirmation of the 64MB vs 128MB? Intel only produces 128MB atm.

Gigabyte was wrong with their Brix and 64MB there.
 
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