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SIS not to go 0.13. Was that Nvidias problem?

Originally posted by: cmdrdredd
it could just be a cost issue
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DigiTimes: SiS to scrap 0.13-micron plans, announces new focus on profit
Silicon Integrated Systems (SiS) will discontinue all production and development plans at 0.13 microns and below within its own facilities and may begin taking contract-manufacturing orders in the future, confirmed company chairman John Hsuan.

Hsuan, also CEO and vice chairman of United Microelectronics Corporation (UMC), was speaking at his first investors conference as chairman of SiS after UMC took a nearly 30% stake in the Taiwanese graphics chip maker last month.

SiS began 0.13-micron test production at its 8-inch fab in the first quarter of 2002 and had originally planned to produce graphics chips using 0.13-micron processes in the second half of that year, but plans were stalled once negotiations began with UMC last year.

Now, Hsuan wants to steer SiS toward more cooperation with UMC in advanced processes. The graphics chipmaker is expected to complete the first batch of wafer inputs for volume production at UMC in the second quarter. However, production at SiS?s own 8-inch fab will continue, though only up to the 0.15-micron node.

Asked whether UMC now plans to take over SiS?s fab operation, Hsuan stressed that the important point rather lies in raising SiS?s fab to a level of a dedicated foundry.

Meanwhile, Hsuan scrapped SiS?s old strategy of using low prices to grab market share, pointing out that the company?s gross margin fell from an average of 26% in 2001 to as low as 17% in the fourth quarter of 2002 and an average of 21% last year even though revenues grew 58% year-on-year.

Besides targeting profit this year, the new chief aims to lift gross margins to 30% with the help of UMC and a new focus on the high-quality, high-end market. Revenue is targeted at NT$20 billion this year.
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Bottom line. 😉
Right in the article.
 
Looks like a very wise decision.

Was the move to .13µ a poor decision for nVidia? Obviously I don't know the details of why they've had difficulties in delivering NV30, but it does seem that the transition to .13µ is not going well for them.

Shrinking from .18µ to .13µ is significantly more challenging than previous process shrinks. And the upcoming process shrinks won't be any easier.
 
At the rate this is going, it's really starting to look like only a handful of companies will be able to produce on the .13 and .09 processes. Intel will of course, along with AMD/IBM, TI, and maybe TSMC and UMC, but right now, it doesn't seem like anyone else(out of the larger companies) is having any luck with .13.
 
Originally posted by: Wingznut
Looks like a very wise decision.

Was the move to .13µ a poor decision for nVidia? Obviously I don't know the details of why they've had difficulties in delivering NV30, but it does seem that the transition to .13µ is not going well for them.

Shrinking from .18µ to .13µ is significantly more challenging than previous process shrinks. And the upcoming process shrinks won't be any easier.
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you'll tell us all about it when they transfer you to 0.09 µm mask development, right? 😉
 
Originally posted by: RaynorWolfcastle
Originally posted by: Wingznut
Looks like a very wise decision.

Was the move to .13µ a poor decision for nVidia? Obviously I don't know the details of why they've had difficulties in delivering NV30, but it does seem that the transition to .13µ is not going well for them.

Shrinking from .18µ to .13µ is significantly more challenging than previous process shrinks. And the upcoming process shrinks won't be any easier.
Click to expand...

you'll tell us all about it when they transfer you to 0.09 µm mask development, right? 😉
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I'm hoping to skip .09µ and go right to .065µ. But, we'll see. 😉

 
Originally posted by: Wingznut
Originally posted by: RaynorWolfcastle
Originally posted by: Wingznut
Looks like a very wise decision.

Was the move to .13µ a poor decision for nVidia? Obviously I don't know the details of why they've had difficulties in delivering NV30, but it does seem that the transition to .13µ is not going well for them.

Shrinking from .18µ to .13µ is significantly more challenging than previous process shrinks. And the upcoming process shrinks won't be any easier.
Click to expand...

you'll tell us all about it when they transfer you to 0.09 µm mask development, right? 😉
Click to expand...
I'm hoping to skip .09µ and go right to .065µ. But, we'll see. 😉
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.065!? That's not even due until 2005, isn't it? If you get assigned to it, good luck, and start using Rogaine now, you'll need it to keep all of your hair.😉
 
Originally posted by: velferdskiller
Originally posted by: Yozza
They'll probably outsource future production to UMC instead of maintaining their own fab.
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They are staying with TSMC 😉
Digitimes
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As quoted earlier to Digitimes, UMC's CEO is now Chairman of SiS. I believe they were never oursourcing production to TSMC in the first place, having their own fab instead.

To quote from the digitimes article:
Now, Hsuan wants to steer SiS toward more cooperation with UMC in advanced processes. The graphics chipmaker is expected to complete the first batch of wafer inputs for volume production at UMC in the second quarter.
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[own emphasis added]

The Inquirer reports the same here.
 
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