SunnyD
Belgian Waffler
Originally posted by: mrSHEiK124
Originally posted by: Cookie Monster
How does one measure intercore bandwidth?? AMD seems to suffer alot when it comes to this synthetic benchmark. Any ideas on why?
Shanghai is shaping up nicely. Along with HT3.0 and other refinements to the process (faster clocked shanghai's hopefully), this chip is going to be very competitive in the server market.
I think it's because all the launch day Shanghai stuff is only running HT1.0. Isn't my Socket 939 Athlon 64 X2 of yester-generation running at HT2.0? That would explain a whole lot.
Not only that, but isn't AMD's intercore bandwidth actually link-to-link with independent links between cores whereas Intel's is basically the aggregate FSB bandwidth? Since each core an AMD quad will have 3 independent HT links linking to each of the other cores as well as a link to the memory bus, I think you really have to multiply that number by 3 (each core has independent links to every other core), and you have to divide Intel's bandwidth by whatever percentage a given core is hogging the bus. (I could be wrong)