(Semiwiki) Intel 14nm Delayed Again?

[Mondozei]

PC sales slump 19%, manufacturers look for exit

http://timesofindia.indiatimes.com/t.../30248511.cms?

Annual car sales in India witness first decline in 11 years. Just a few days ago:

http://articles.economictimes.india...indian-automobile-manufacturers-auto-industry

Signally tough times ahead for the passenger car industry, annual car sales declined for the first time in 11 years in 2013 posting a 10 per cent decline to 18.07 lakh units with the prolonged slowdown likely to continue for the next six months of 2014.

India's economy is not doing well at all. PC sales, auto sales etc.

PC gaming is basically shrugging it all off and continues to show off decent revenue growth year over year, as we saw with Nvidia's PC gaming business just a few days ago and AMD's before that.

But even if you look at the total PC market it is expected to stabilise this year and then grow slightly up until 2017.

Most of the casuals have been lost at this point and the people remaining are people who understand that productivity is a joke on a tablet and even on a laptop if you want a 24" screen or more and a very good keyboard(or if you just need the horsepower for video editing, images, large spreadsheets etc).

But that being said, I think the delays is mostly about the fact that Moore's law is indeed slowing down as have been predicted for a long time. 10 nm will likely be the last node that will be reached relatively "easy".

Otellini, the last CEO, basically predicted that by 2017, silicon would no longer be feasible. Let's hope he was wrong about that prediction.
(Of course, there are replacements which can do the job, the question isn't the technical part, but rather the time horizon. Will they get out there in time?).

 

[Homeles]

SiGe and/or Ge is on track to begin replacing silicon by then.

 

[zir_blazer]

SiGe and/or Ge is on track to begin replacing silicon by then.

Didn't AMD implemented SiGe back at the 90nm-to-65nm transition? I recall some AMD slides saying that they were going to introduce SiGe at 90nm (Which should have been the last F3 K8s Revision, including Windsors), but can't find more info. Not sure about Intel, but at least AMD shouldn't be new to that. Actually, I don't know if they droped it and why. But when people talks about SiGe, I just recall that I heared about it being already in use for commercial Processors around 7 years ago.

 

[krumme]

Capex was always going to be affected by ASML bailing on 450.

Yes. But when there is trouble on a process node - eg here 14nm - you always have to decide cost/benefit of accelerating solving the problems. The plan for 14nm was made years back. Now the priorities is different for good reasons, and Intel adapts their plans. Time is very much needed money here.

The most idiotic about it is Intel have to wrap it all kinds of stupid words for what is obviously good priorities. But they have also raised people in the belief that pre-soviet like execution plans is the Holy Grail and not keeping deadlines is evil.

Tick - Tock - brain stop.

 

[witeken]

SiGe and/or Ge is on track to begin replacing silicon by then.

What about the III-V materials?

 

[Homeles]

Didn't AMD implemented SiGe back at the 90nm-to-65nm transition? I recall some AMD slides saying that they were going to introduce SiGe at 90nm (Which should have been the last F3 K8s Revision, including Windsors), but can't find more info. Not sure about Intel, but at least AMD shouldn't be new to that. Actually, I don't know if they droped it and why. But when people talks about SiGe, I just recall that I heared about it being already in use for commercial Processors around 7 years ago.

Sorry, I should have been more clear. SiGe is already used in straining PMOS. What Otellini and I are talking about is replacing Si in the channel, which is the part of a transistor where all the magic happens.

This image helps illustrate what I'm talking about:

The source and drain on PMOS are SiGe, and have been for quite some time as you've mentioned. The channels are still made of silicon. If we replace this with SiGe or Ge, we can improve transistor performance by a lot.

What about the III-V materials?

Probably at 7nm.
http://www.eetimes.com/document.asp?doc_id=1320027

The industry has basically agreed (prior to this) that 10nm is definitely doable, 7nm is iffy, and beyond 7nm isn't possible right now. This development should extend scaling a bit.

 

[witeken]

Slightly off-topic, but what I wonder when I read that article is if it's actually true. Intel has been producing III-V chips for many years, so it seems likely that Intel was actually first.

 

[Homeles]

That's FinFET-specific news.

 

[witeken]

Intel already has Tri-Gate transistors since 2011, that would mean that they failed to make Tri-Gate transistors with III-V materials for ~4 years.

 

[Fjodor2001]

Intel's process tech advantage is shrinking rapidly.

 

[ehume]

Intel's process tech advantage is shrinking rapidly.

Use it or lose it?

 

[Khato]

Intel's process tech advantage is shrinking rapidly.

And how precisely is it shrinking? Much less rapidly shrinking? I know it is on TSMC's marketing slides, but that's nothing new.

 

[krumme]

Intel's process tech advantage is shrinking rapidly.

Its slowly shrinking but that not nessesarily a problem. So thats not the challenge for Intel. The problem is the benefit for the customers of a process advantage is shrinking relative to the cost for Intel to maintain that difference.

So its the consumer benefit thats shrinking relatively fast. Relative to cost that is.

 

[ShintaiDK]

Intels lead is expanding when you look on TSMC. 3 year cycle for 20nm, 4 year before a real 16nm. They even have to cheat and call 20nm with finfets for 16nm. Just like GloFos 14XM. Not to mention the first 20nm is SOC targetted.

TSMC is parked.

 

[witeken]

Its slowly shrinking but that not nessesarily a problem. So thats not the challenge for Intel. The problem is the benefit for the customers of a process advantage is shrinking relative to the cost for Intel to maintain that difference.

So its the consumer benefit thats shrinking relatively fast. Relative to cost that is.

Intel's process advantage is in fact growing. When TSMC releases their real 14nm process (called 10nm) 2 years after 16nm, Intel will already have 10nm for a long time or maybe almost 7nm (which means an advantage of at least 3 years). I'm also not sure how TSMC wants to compete with those post-silicon transistors of Intel.

 

[jpiniero]

Intels lead is expanding when you look on TSMC. 3 year cycle for 20nm, 4 year before a real 16nm.

You're assuming Intel doesn't slow down as well. I expect Intel to spend at least 3 years at 14 nm, depending more on the status of EUV more than anything.

 

[Homeles]

You're assuming Intel doesn't slow down as well. I expect Intel to spend at least 3 years at 14 nm, depending more on the status of EUV more than anything.

EUV isn't happening at 10nm. It isn't necessary, and it's still not ready.

 

[jdubs03]

7nm won't come til 2018, and a lot can happen until then.

I remember a post a couple months back (forget who said it) that an Intel engineer insinuated that any lessons learned at 14nm could be applied to 10nm, so I do not think that Intel will have any issues after 14nm until 7nm and EUV/450mm/Ge-IIIV implementation.

Trying to cut through all the BS when it comes to these process nodes is getting kind of tiring, I think Intel has a 1.5-2 year lead on TSMC (though they claim to have a FinFet+ offering 15% over the original), but I'm not sure about Samsung, they could be closer.

 

[krumme]

Intel's process advantage is in fact growing. When TSMC releases their real 14nm process (called 10nm) 2 years after 16nm, Intel will already have 10nm for a long time or maybe almost 7nm (which means an advantage of at least 3 years). I'm also not sure how TSMC wants to compete with those post-silicon transistors of Intel.

Bs. I think 14nm will be actually close for density.
Intels bragging have always showed. Look at their 45nm beeing so far away to 40nm tsmc in density its incredible. Only time will show.

 

[OCGuy]

Intel's process tech advantage is shrinking rapidly.

They had working 14nm chips @ IDF in September.

 

[witeken]

Sorry, I should have been more clear. SiGe is already used in straining PMOS. What Otellini and I are talking about is replacing Si in the channel, which is the part of a transistor where all the magic happens.

This image helps illustrate what I'm talking about:

The source and drain on PMOS are SiGe, and have been for quite some time as you've mentioned. The channels are still made of silicon. If we replace this with SiGe or Ge, we can improve transistor performance by a lot.

Probably at 7nm.
http://www.eetimes.com/document.asp?doc_id=1320027

The industry has basically agreed (prior to this) that 10nm is definitely doable, 7nm is iffy, and beyond 7nm isn't possible right now. This development should extend scaling a bit.

Now I understand what you're talking about:

7nm, 5nm, 3nm: The new materials and transistors that will take us to the limits of Moore’s law

Beyond 14nm, as we move to 10 and 7nm, a new fin material will be required — probably silicon-germanium (SiGe), or perhaps just pure germanium. SiGe and Ge have higher electron mobility than Si, allowing for lower voltages, and thus reducing power consumption, tunneling, and leakage. SiGe has been used in commercial CMOS fabrication since the late ’80s, too, so switching from silicon won’t be too painful.

Basically, at 10nm, a Si/Ge Tri-Gate transistor is needed, and at 7nm Intel will move to III-V materials.

 

[Homeles]

Yep. III-V might not be used at 7nm. I'd actually think it'd be a little silly for them to use something Germanium based for only one process node. It's on its way, though.

Using Germanium and III-V is an extension of the methods developed for replacement gate HKMG, interestingly enough. HKMG was a real breakthrough for the industry.

 

[Fjodor2001]

They had working 14nm chips @ IDF in September.

Broadwell @ 14 nm was already taped out and working in September 2012, see this. Providing it to end customers at high volume production and with sufficient yields is apparently another story. Either that, or Intel is intentionally using its close-to-monopoly position to delay the release to maximize return on invested R&D budget, see this.

 

[witeken]

Yep. III-V might not be used at 7nm. I'd actually think it'd be a little silly for them to use something Germanium based for only one process node. It's on its way, though.

I think 7nm will use III-V, maybe already at 10nm, if we can believe Paul Otellini:

Speaking at San Francisco’s Web 2.0 Summit last week, Intel CEO Paul Otellini said that silicon was in its last decade as the base material of the CPU.

Otellini forecast that Intel would produce “three more generations” of silicon processors before shifting to a new semiconductor material.

Given that Intel’s ‘tick-tock’ model sees a new microarchitecture every two years – and starting at the current 45nm ‘Nehalem’ silicon microachitecture, which will be followed by 32nm (‘Sandy Bridge’) in 2011, then 22nm (Haswell’) in 2013 and 16nm (codename unknown) in 2015 – then Otellini’s talking about the first wave of non-silicon processors kicking off by 2017.

Source: http://apcmag.com/intel-looks-beyond-silicon-for-processors-past-2017.htm (2009)

 

[witeken]

Broadwell @ 14 nm was already taped out and working in September 2012, see this. Providing it to end customers at high volume production and with sufficient yields is apparently another story. Either that, or Intel is intentionally using its close-to-monopoly position to delay the release to maximize return on invested R&D budget, see this.

It was a defect density issue. The last thing that Intel wants is to lose its process advantage.