Second-class Intel to trail AMD for years

[thecoolnessrune]

Originally posted by: The Register
"Intel takes a very definitive lead in performance and power management at 65 nanometers," Dell said at a conference, according to a report from IDG News Service. "If we thought AMD was going to be supercompetitive in the spring and fall of next year, we'd be introducing AMD products right now."

OMFG!!!! HA HA HA HA. My sides hurt so much. That was such a good laugh!!! HA HA HA HA. Go to hell Dell :|

 

[dmens]

Look for Nehalem in TheInq... it's there. Guess I shouldn't say any more if the roadmaps don't show it yet, LOL. Either way, with P4 off the table, any previous usage of that codename ought to be considered stale. But to answer Vidtor, yes, because I am working on it.

 

[johnnqq]

without intel, amd will be overpriced...

 

[bjc112]

Originally posted by: fatty4ksu
Trust me. Intel will be mighty, mighty fine.

For once, I agree.

 

[sonoran]

Hey dmens - I hear we're all doomed, so we should just pack up and go home now. Did you tell Otellini to turn the lights off on his way out, or should I?

PS - Chicken Little said the sky's falling too. They're even making a movie about it, so it must be true. Could be a Safety & Security issue... :Q

* Not speaking for Intel Corporation *

 

[dmens]

Yeah lol I heard intel engineers suck so much, might as well give the fab keys to Hector.

 

[ewvaname]

nt

 

[Cyron5]

Originally posted by: SickBeast
I really don't know what is stopping intel from making an on-die memory controller. Even Wingznut (an intel engineer) has stated that he wishes they would go with such a design.

Maybe it's pride holding them back.

Intel has already responded to the question of on-die memory controllers. I'm sorry I don't have a link, but the interview was published almost a year ago. The decision to keep the memory controller off-die is driven by a desire to maintain CPU architecture independent of memory technology implementation. The point was to allow Intel to incorporate new (cutting-edge) memory technologies into current and future processor implementations without having to retool the die.

My personal opinion is that memory, like all new technology, goes through a significant "maturing" phase (e.g. DDR2) when it's performance and new features are rarely justified by exhorbitant early adoption pricing. I agree with the poster and, historically, there seems to be very little benefit in keeping the controller off-die in light of the price/performance history and trends regarding recent memory technologies including RAMBUS, DDR1 and DDR2 especially.

But, I'm not privy to the high level meetings where they decided this. There could be one or many other reasons, perhaps not performance related, the group may have considered prior to making their decision. Just remember, what the PR-man puts out is never all the information. Intel's interests and their priorities, or AMD's for that matter, rarely match those of their consumers.

I am an Intel employee working in a processor technology division. The views expressed in this message are mine alone and do not in any way represent those of Intel Corporation.

 

[Viditor]

Originally posted by: dexvx
It does not take 2 years to get certification in the server community. It has taken AMD 2 years, but that was because Opteron was brand new to the market (it has also taken Itanium 2 years because it was brand new to its market). As for servers in the intended Xeon range, once third party Q&A gives it its certifications, it is more or less ready to go. Such certifications take a long time, but not 2 years of public release.

As is CSI...which of course was exactly my point...
This is not just a Xeon extension, but a whole new interconnect and design!

 

[Viditor]

Intel will have conroe mid to late 2006 which does'nt need a intergrated memcontroller to compete

And you know this because...

And more importantly it will ramp higher due to intels 65nm processes which anand has already given us a preview of.

Ummm...Anand showed us that 65nm P4 will ramp higher than a 90nm P4 (but not much). We have absolutely NO data on ramping a chip that nobody has seen. Nor for that matter do we have any idea if will be even as good as the P4! I know many people want to believe it will be, but at this point that's all it is...a belief.

 

[dmens]

Originally posted by: Viditor
a chip that nobody has seen

Can't give numbers, but it's better than Cedarmill.

As I said earlier in the thread, not having an on-die memory controller is not the end of the world.

 

[Viditor]

Originally posted by: dmens
Look for Nehalem in TheInq... it's there. Guess I shouldn't say any more if the roadmaps don't show it yet, LOL. Either way, with P4 off the table, any previous usage of that codename ought to be considered stale. But to answer Vidtor, yes, because I am working on it.

I have indeed looked...but there is absolutely nothing about it being CSI. In fact, Intel is still keeping CSI details under tight wraps. This says to me that we are 2 years+ away from any CSI based system being adopted (for the reasons I mentioned above). Once Intel makes their announcement with details to the server community and a means for using and testing CSI platforms, then the clock starts ticking...

 

[Viditor]

Originally posted by: dmens

Originally posted by: Viditor
a chip that nobody has seen

Can't give numbers, but it's better than Cedarmill.

As I said earlier in the thread, not having an on-die memory controller is not the end of the world.

So you are working on both projects? Cool...
I agree with you that not having an on-die memcontroller for a desktop chip isn't the end of the world. Of course saying "it's better than Cedarmill" isn't exactly a huge endorsement...
For Intel's sake, it better be a LOT better than Cedarmill...!

 

[dmens]

Nah, just one project, but the Israeli guys are cool. I think "better than Cedarmill" is all I can safely say, haha.

As Cyron said, publicly released info is always incomplete. I'm just making predictions too since I'm just another cog in the CPU design machine... as for adoption, Intel has a great deal of clout and being a platform company now (snicker) the higher-ups probably have some way to speed the certification of CSI-equipped platforms.

 

[Viditor]

Originally posted by: Cyron5


Intel has already responded to the question of on-die memory controllers. I'm sorry I don't have a link, but the interview was published almost a year ago. The decision to keep the memory controller off-die is driven by a desire to maintain CPU architecture independent of memory technology implementation. The point was to allow Intel to incorporate new (cutting-edge) memory technologies into current and future processor implementations without having to retool the die.

My personal opinion is that memory, like all new technology, goes through a significant "maturing" phase (e.g. DDR2) when it's performance and new features are rarely justified by exhorbitant early adoption pricing. I agree with the poster and, historically, there seems to be very little benefit in keeping the controller off-die in light of the price/performance history and trends regarding recent memory technologies including RAMBUS, DDR1 and DDR2 especially.

But, I'm not privy to the high level meetings where they decided this. There could be one or many other reasons, perhaps not performance related, the group may have considered prior to making their decision. Just remember, what the PR-man puts out is never all the information. Intel's interests and their priorities, or AMD's for that matter, rarely match those of their consumers.

I am an Intel employee working in a processor technology division. The views expressed in this message are mine alone and do not in any way represent those of Intel Corporation.

Where it gets sticky is in bandwidth for multicore server CPUs. As Intel moves to distributed data (like CSI), they almost HAVE to move to an on-die memcontroller.

 

[Viditor]

Originally posted by: dmens
Nah, just one project, but the Israeli guys are cool. I think "better than Cedarmill" is all I can safely say, haha.

As Cyron said, publicly released info is always incomplete. I'm just making predictions too since I'm just another cog in the CPU design machine... as for adoption, Intel has a great deal of clout and being a platform company now (snicker) the higher-ups probably have some way to speed the certification of CSI-equipped platforms.

I know that Intel has plenty of clout, but as dexvx pointed out, even Itanium took 2 years for certification...

Edit: I should add that if Intel had any way to speed up the certification process on Itanium, they most certainly would have done so (the delay cost them billions...). And, they had HP helping them then as well...