FIG. 1 illustrates a perspective view of a first multi-chip module implementing physical memory according to some embodiments. Multi-chip module 100 generally includes a multi-core processor chip 120 and a memory chip stack 140. Memory chip stack 140 includes a plurality of memory chips stacked on top of each other. As illustrated in FIG. 1, memory chip stack 140 includes a memory chip 142, a memory chip 144, a memory chip 146, and a memory chip 148. Note that, in general, memory chip stack 140 may include more or fewer memory chips than illustrated in FIG. 1. Each individual memory chip of memory chip stack 140 is connected to other memory chips of memory chip stack 140, as desired for proper system operation. Each individual memory chip of memory chip stack 140 also connects to multi-core chip 120, as desired, for proper system operation.
FIG. 2 illustrates a perspective view of a second multi-chip module 200 implementing physical memory according to some embodiments. Multi-chip module 200 generally includes an interposer 210, a multi-core processor chip 220, and a memory chip stack 240. Interposer 210 is connected to the active side of multi-core chip 220. Memory chip stack 240 includes a plurality of memory chips stacked on top of each other. As illustrated in FIG. 2, memory chip stack 240 includes memory chip 242, memory chip 244, memory chip 246, and memory chip 248. Note that, in general, memory chip stack 240 may include more or fewer memory chips than illustrated in FIG. 2. Each individual memory chip of memory chip stack 240 is connected to other memory chips of memory chip stack 240, as desired for proper system operation. Each individual memory chip of memory chip stack 240 is also connected to multi-core chip 220, as desired for proper system operation. In some embodiments, memory chip stack 240 includes a single memory chip. In some embodiments, the multi-chip module 200 includes more than one memory chip stack like memory chip stack 240.