Based on the original instruction sets for the core architectures, it should be:
Althon XP 2800+ -> CISC
P4 2.8 GHz -> CISC
PowerPC G4 -> RISC
But the terms have little meaning any more outside of academia. The Athlon and Pentium 4 both take a CISC instruction set and decode them into RISC micro-ops and the G4's RISC-like instruction set has been looking increasingly less RISC-like as the design matures. I'd say all three should really be catagorized as a mix of the two types.