Discussion RDNA 5 / UDNA (CDNA Next) speculation

[marees]

Seems like AT free forums has more info than Tom's paid content !!

Potentially using this, can expect a range from 96 CUs all the way down to 32 CUs for UDNA, with GDDR7 memory being the VRAM technology of choice.​

Desktop GPU roadmap: Nvidia Rubin, AMD UDNA & Intel Xe3 Celestial

Where is the desktop GPU market headed? We investigate.

www.tomshardware.com

 

[marees]

That's the reason why we need an API like cooperative vectors. It is programmable like vectors but you can offload math operations to matrix accelerators.







If you don't believe me, read the docs and learn the math:

• https://github.com/microsoft/hlsl-specs/blob/main/proposals/0029-cooperative-vector.md
• https://developer.nvidia.com/blog/neural-rendering-in-nvidia-optix-using-cooperative-vectors/
• https://chortle.ccsu.edu/vectorlessons/vectorindex.html

Co-operative vectors approach has a latency penalty unless the GPU is ground up designed for it, maybe RDNA 6 or higher

Even then it may never catch on. Just like mantle & vulkan are superior to DirectX

Contrast between ML2CODE approach vs DirectX approach




https://www.pcgamer.com/hardware/gr...one-ai-upscaling-tech-can-run-on-nvidia-gpus/

 

[adroc_thurston]

Co-operative vectors approach has a latency penalty unless the GPU is ground up designed for it, maybe RDNA 6 or higher

well yeah that's how matrix cores work.

 

[Kaluan]

MDS-1 = medusa point aka strix point successor with 8 CUs & 50? TOPS

MDS-2 = medusa point "little" a new low power variant probably on a new TSMC low power node with 4? CUs & 50? TOPS

MDS-3 = medusa point "baby" aka bumblebee — future Mendocino replacement in theory but TSMC 3nm so will continue to be priced a tier above Mendocino

Now imagine zen-7 monolithic APUs in 2029-2030 with RDNA 5.5??

they will not need 50 or 75 TOPS NPU as RDNA 5.5 by itself has that capability. So let's assume the zen 7 successors to MDS1, MDS2, & MDS3 all have igpus that can do minimum of 75 TOPS

So MDS-2 successor with zen 7 & RDNA 5.5 would be ideal for a monolithic handheld to replace steam deck & compete with switch 2 & PS6 handheld

Ohh yeaah, was looking up leaks on Strix Point successors later that day and thought the abbreviation looked familiar. Thanks!

Handhelds and small form factor PCs were also what I was looking for and came across the upcoming LPDDR6 standard. Particularly the higher than the "traditional" 2x transfer rate (up to 3200MTs -> 6400MTs -> 14400MTs) of gen-to-gen (ignoring the typical 1.33x bump "X" extensions that typically follow for now) AND the 50% bump to channel width, making both "lite" 96bit devices and high(er) end 192bit devices possible (from what I gather, likely with ECC as a baseline too). As well as 384bit Medusa Halo.

Looks like AMD could nearly triple the bandwidth of Strix Point/Z2E generational successors (128GB/s vs 'up to' 345GB/s, or nearly 460GB/s for the hypothetical LPDDR6X that would follow, if the standard 1.33x bump is to be expected).
Of course if mass produces LPDDR6 are out by then, but I'm guessing they will.
That's a generous enough bump that would likely keep these small APU iGPUs from needing MALL memory, but from what I read, rumors are AMD will have L4/Infinity Cache on MDS1 and not just Medusa Halo (if that will be a thing).

Now, I can barely wrap my mind around Zen6/RDNA5(/XDNA3?) APUs, which is probably around the point I might look into a handheld PC/gaming device... Let alone next-next haha
But I suppose next year, after we get a lot more concrete information on this (CES at the earliest, when we might get a up-to-date roadmap), I will drool at Zen7/RDNAnextnext/LPDDR6X APU prospects too

 

[marees]

Now, I can barely wrap my mind around Zen6/RDNA5(/XDNA3?) APUs, which is probably around the point I might look into a handheld PC/gaming device... Let alone next-next haha
But I suppose next year, after we get a lot more concrete information on this (CES at the earliest, when we might get a up-to-date roadmap), I will drool at Zen7/RDNAnextnext/LPDDR6X APU prospects too

If you are interested in affordable, light weight & long battery life then monolithic zen 7 in 2029 / 2030 should be it

If you are OK spending upwards of $800+ then chiplet based medusa premium should be out in 2027-2028 time frame

 

[Kaluan]

If you are interested in affordable, light weight & long battery life then monolithic zen 7 in 2029 / 2030 should be it

If you are OK spending upwards of $800+ then chiplet based medusa premium should be out in 2027-2028 time frame

Might as well, thanks for the info, I'll keep an eye out, haven't followed anything related to Zen7 as of these last few days lol

I have a lot of other things to get in the near and mid-term future anyway and I'm not exactly swimming in resources these days (mirrorless camera & lenses, a semi-pro steering wheel peripheral, home redecoration, language and vocational change courses/education etc ughhh)

 

[Vikv1918]

Edit: wrong thread

 

[SolidQ]

Obvious game target PS6, and this next gen Decima engine.
Wonder how it's gonna run on PS6 RDNA 5.

https://twitter.com/x/status/1970452167862677603

 

[adroc_thurston]

Obvious game target PS6, and this next gen Decima engine.
Wonder how it's gonna run on PS6 RDNA 5.

https://twitter.com/x/status/1970452167862677603

It's UE5, not Decima.

 

[SolidQ]

It's UE5, not Decima.

isn't OD for Xbox is UE5, and PsyHint for PS5/6 is Decima?

 

[Win2012R2]

If you are OK spending upwards of $800+ then chiplet based medusa premium should be out in 2027-2028 time frame

About the price of Xbox Series X now...

Wonder how it's gonna run on PS6 RDNA 5

Is it Unreal Engine 5?
Yes: Very slow and stuttery
No: Fast!

 

[Kepler_L2]

From LLVM documentation:

A bit annoying that they now interchangebly use WGP and CU but either way there's no split mode (2x SIMD32) anymore and L0 has been combined with LDS and also across the WGP/CU.

 

[Kepler_L2]

Also no reference to MALL for gfx12.5 either

 

[soresu]

It's UE5, not Decima.

Gawd it's even got the tiny fuzzy facial hairs too!

 

[igor_kavinski]

Gawd it's even got the tiny fuzzy facial hairs too!

No way to touch them though.

FAIL!

 

[Kaluan]

From LLVM documentation:
View attachment 130870
A bit annoying that they now interchangebly use WGP and CU but either way there's no split mode (2x SIMD32) anymore and L0 has been combined with LDS and also across the WGP/CU.

The Compute Unit is dead. Long live the Compute Unit Workgroup Processor!

 

[Tigerick]

From LLVM documentation:
View attachment 130870
A bit annoying that they now interchangebly use WGP and CU but either way there's no split mode (2x SIMD32) anymore and L0 has been combined with LDS and also across the WGP/CU.

Based on past history, could GFX125x refer to RDNA 4.5 GPU architecture which might be mobile version of RDNA5.

So far, there are few upcoming mobile APUs are rumored to use RDNA3.5+, could GFX125x GPUs are referring to such iGPU?

 

[Kepler_L2]

Based on past history, could GFX125x refer to RDNA 4.5 GPU architecture which might be mobile version of RDNA5.

So far, there are few upcoming mobile APUs are rumored to use RDNA3.5+, could GFX125x GPUs are referring to such iGPU?

It's MI400

 

[marees]

It's MI400

So CDNA 5 (MI400) is derived of pre RDNA 5 architecture?

Will the next version MI500 be based of RDNA 5 ?

 

[adroc_thurston]

So CDNA 5 (MI400) is derived of pre RDNA 5 architecture?

They kinda now derive into each other.

Will the next version MI500 be based of RDNA 5 ?

Yeah you'll see how it is.

 

[MrMPFR]

Based on past history, could GFX125x refer to RDNA 4.5 GPU architecture which might be mobile version of RDNA5.

So far, there are few upcoming mobile APUs are rumored to use RDNA3.5+, could GFX125x GPUs are referring to such iGPU?

GFX tag has nothing to do with µarch/microarchitecture. It notes ISA/instruction set architecture.

But MI400 seemingly getting a RDNA4 derived ISA (GFX 12.5 vs GFX12) is interesting. Major implications for AMD's nextgen + future of SW development. Can't be the only one wondering what the implications will be, so perhaps someone can enlighten us all.

Supposedly MI500 sharing underlying ISA (with MI side extensions and changes on top) with RDNA 5 interesting as well.

Is this shared ISA to make porting code from MI to RX easier an aspect of UDNA?

Yeah you'll see how it is.

Thought RX and MI wouldn't become more µarch aligned given Kepler's earlier statements on UDNA.

So MI500 launches after RDNA 5 similar to RDNA 4 vs MI400?

 

[marees]

GFX tag has nothing to do with µarch/microarchitecture. It notes ISA/instruction set architecture.

But MI400 seemingly getting a RDNA4 derived ISA (GFX 12.5 vs GFX12) is interesting. Major implications for AMD's nextgen + future of SW development. Can't be the only one wondering what the implications will be, so perhaps someone can enlighten us all.

Supposedly MI500 sharing underlying ISA (with MI side extensions and changes on top) with RDNA 5 interesting as well.

Is this shared ISA to make porting code from MI to RX easier an aspect of UDNA?


Thought RX and MI wouldn't become more µarch aligned given Kepler's earlier statements on UDNA.

So MI500 launches after RDNA 5 similar to RDNA 4 vs MI400?

Some kind of realignment seems to have happened post UDNA.

I think MI400 (CDNA 5) being a derivative of RDNA 4 is a reflection of that

RDNA 5 seems massive on client side as AMD is seemingly doing away with the NPU tax on windows

Going forward RDNA 6 , 7 etc will follow a 2 year cadence (as usual) while MI400, MI500, etc. will follow a yearly cadence (atleast until this bubble lasts)

 

[poke01]

RDNA 5 seems massive on client side as AMD is seemingly doing away with the NPU tax on windows

you don't need to improve your NPU anymore if your GPU is very good for AI

 

[stayfrosty]

For the XCD I don't know the node, but some N2 variant is likely imo.

Have you in the meantime found out the node of the MI400 XCD?

 

[adroc_thurston]

Thought RX and MI wouldn't become more µarch aligned given Kepler's earlier statements on UDNA.

What's UDNA?