Discussion RDNA 5 / UDNA (CDNA Next) speculation

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fastandfurious6

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Jun 1, 2024
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makes a lot of sense RDNA5 shares CU architecture between desktop and mobile

medusa halo and ps6 definitely have it
 

ToTTenTranz

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Feb 4, 2021
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The halo may not be a "gaming" GPU. I don't think AMD can sell a $2000 gaming GPU . Its primary purpose could be something else. Something like the Radeon VII
The AT0 XL entry in the table with 36GB GDDR7 clearly says "Desktop Gaming".


And I'm guessing the AT0 XT-R 72GB part with 450W TBP might be a prosumer part as well. With 72GB they can easily sell it for >$3k as a gaming+AI solution unless there are unforeseen surprises along the next 2 years (like an AI bubble burst).


Is that really to be a 6090 competitor? Presumably, Jensen is staying near reticle limit, near 600W, and still 512-bit GDDR7 but now 3nm and with 24gbit memory chips.
If both are near reticle limit and using the same fab process and RAM tech, then it really becomes a challenge between architectures and drivers.
 
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tsamolotoff

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May 19, 2019
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letsgoooo
Are those top 4 SKUs apart from the poverty version some sort of dual-chip design (even if this table is legit and not done by some certain people making MLID look like an AI)? all of them have >2 VCNs (is that the video encoding engine or what?), and look like to be cut down for the sake of efficiency?
 

gdansk

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Feb 8, 2011
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all of them have >2 VCNs (is that the video encoding engine or what?)
VideoCoreNext. If this part ships maybe it is because some customer wanted streaming GPUs, for gaming or visualization, and we get the scraps. Xbox/Azure streaming crap?
 

basix

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Because it isn't.
The slide references to that chip as AT0-XL. When the full design features 192 CU, AMD could go for an AT0-XT with more CUs, full 512bit and 48 GByte. That could be a 6090 contender. But it doesn't make sense to release such a chip, if you are not at least head-to-head to a 6090. If AMD sees a chance, they might push the full chip to gaming as well.

That AMD is going that big on a chip has probably only one reason: AI/ML. The 5090 sells very well because of that.
 
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gdansk

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When the full design features 192 CU
That's GB202 as well. Everyone, including AMD, assumes Nvidia will go bigger and/or badder. So, where are they aiming if they target last gen's biggest and baddest?

Probably not a Halo part unless they're targeting much higher clock rates. That seems risky given Radeon's misses there. The low board power for the gamer chop also makes that questionable.
 

gdansk

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I believe AT3 is the 9060xt replacement of RDNA 5 gen
I had hoped 12GB/44 CU/128 bit was as small as they'd go this time. But I guess it couldn't use the chips shown here because they all list only GDDR7 and Medusa Halo would be using LPDDR6 or 5x.
 

basix

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That's GB202 as well. Everyone, including AMD, assumes Nvidia will go bigger and/or badder. So, where are they aiming if they target last gen's biggest and baddest?
Such a 192 CU chip will definitely be faster than a 5090, when a 5090 is ~1.8x as fast as a 9070 XT with 64CU. Would it be 1.3x / 1.5x / 1.8x faster? We will see.

AT3 will probably feature 36CU and 128bit with 1x SE (according to huge SE spculation from Kepler_L2).
But I do not like the 12 GByte AT2 version. I would rather like to see 72 / 64 / 54 CU with 18 / 18 / 15 GByte.
 
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tsamolotoff

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VideoCoreNext.
Normally, yes, but is it in this case? Why waste silicon on a feature that's only for some sort of enterprise/niche audience. Thats' why I hypothesized that it's a combo of two cut-down dies (each of which has dual VCNs) with something like 90-ish CUs and 256 bit bus linked via something like the MI3xx or other MCM devices.
 

basix

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So could the medusa halo share the AT3 chip ?
Interesting idea. From GPU performance aspects etc. it would match well. But the big advantage of Strix Halo is the big unified LPDDR5 memory pool. There might be ways to keep that, but all solutions I can think seem to be kinda awkward.

Normally, yes, but is it in this case? Why waste silicon on a feature that's only for some sort of enterprise/niche audience. Thats' why I hypothesized that it's a combo of two cut-down dies (each of which has dual VCNs) with something like 90-ish CUs and 256 bit bus linked via something like the MI3xx or other MCM devices.
Interesting idea as well. Could explain the missing AT1 in the slide. But I somehow doubt, that the Die is split in two. AT1 could simply have been cancelled.
 
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gdansk

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Why waste silicon on a feature that's only for some sort of enterprise/niche audience.
It can't be that niche as GB202 has 4 nvenc/nvdec. MI300 apparently has 4 VCN too.
Constructing with 96 CU CCD seems possible. Composable N31s, basically.
But would such novel construction be affordable? If that's how it is constructed, I bet we get nothing over 96 CU.
 
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SolidQ

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Is that really to be a 6090 competitor?
a) We don't know how many perf per CU compare to RDNA4
b) We don't know nothing about DS Vera Rubin. It can be just another fatter ADA/BW with more SM's

Here is RDNA3 vs RDNA4, ADA vs BW
 
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jpiniero

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I bet we get nothing over 96 CU.

Which would be fine, I think. Just going by the 9070 XT, A theoretical 96 CU part could be like 6080 performance although obviously we don't know much about Rubin.

But I think it'd be in the 400++ W TDP range. The TDPs might be the fakest thing on that slide.
 
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dacostafilipe

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Normally, yes, but is it in this case? Why waste silicon on a feature that's only for some sort of enterprise/niche audience. Thats' why I hypothesized that it's a combo of two cut-down dies (each of which has dual VCNs) with something like 90-ish CUs and 256 bit bus linked via something like the MI3xx or other MCM devices.

Streaming.

Navi 48 (9070XT) already has two VCN.
 
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tsamolotoff

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Streaming.
Yes, ok, but why then the poor man's version has only two, and all the ML/hyperscaler parts have 3 or 4? It'd be another vector of attack for the NV Foundry and the other nv tech PR if the usual super-important things like pathtracing, framegen etc aren't enough to keep the claimed feature advantage over ATi