Discussion RDNA 5 / UDNA (CDNA Next) speculation

[adroc_thurston]

Seems like Hopper has a lot of architecture jargon to go with it

naa.

The only thing that sounds sorta like what you are talking about when I search for it is the "thread block cluster"

TBC is just CUDA-ish for doing CPC-level ops.

or perhaps "asynchronous transaction barriers".

that's just async atomics, GCN1 had them in 2012.

 

[Saylick]

Seems like Hopper has a lot of architecture jargon to go with it, but none of the nVidia official PR I can find mentions this, can you supply a link to wherever you found it?

The only thing that sounds sorta like what you are talking about when I search for it is the "thread block cluster", or perhaps "asynchronous transaction barriers".

Wasn't hard to find... took me 1 minute.


https://developer.nvidia.com/blog/nvidia-hopper-architecture-in-depth/

 

[soresu]

Wasn't hard to find... took me 1 minute.

View attachment 131720
https://developer.nvidia.com/blog/nvidia-hopper-architecture-in-depth/

So basically it's an inter CU data network within each SE?

 

[soresu]

🤔 That might potentially benefit (software/sw-ASIC hybrid) video encoding on the GPU too.

 

[Saylick]

So basically it's an inter CU data network within each SE?

If it's matching how Nvidia does it, i.e. the cluster is within the GPC, then it appears AMD will have it within whatever is their equivalent of a GPC.

 

[adroc_thurston]

If it's matching how Nvidia does it, i.e. the cluster is within the GPC, then it appears AMD will have it within whatever is their equivalent of a GPC.

SE.
They're doing LDS to LDS transfers.
Boring.

 

[Saylick]

SE.
They're doing LDS to LDS transfers.
Boring.

Boring, as in it's been done by their competitor years ago, then sure. But catching up is catching up.

 

[adroc_thurston]

Boring, as in it's been done by their competitor years ago, then sure

No, it's just a hardly relevant feature at all.
I don't think client NV GPUs even have dshmem.

 

[adroc_thurston]

I don't think client NV GPUs even have dshmem.

Wait no it is there.

 

[adroc_thurston]

Wait no it is there.

or not.
god NV documentation is painfully obtuse when it comes to arch-specific features.

 

[adroc_thurston]

or not.
god NV documentation is painfully obtuse when it comes to arch-specific features.

it is there.

 

[Saylick]

You’re flip flopping back and forth like… well, a flip-flop.

 

[adroc_thurston]

You’re flip flopping back and forth like… well, a flip-flop.

Reading NV docs is always a wonderful journey of self-discovery and asking relevant people if you still need to emit part-specific .cubins to get all the features.

 

[Vikv1918]

I wonder whats the reason for this marketing push to highlight the collaboration between Sony and AMD. And why is Sony talking about nextgen features when their goal right now is probably to sell as many PS5 as possible? Wouldnt this just create FOMO for PS6 and make people wait instead of buying PS5?

 

[jpiniero]

I wonder whats the reason for this marketing push to highlight the collaboration between Sony and AMD. And why is Sony talking about nextgen features when their goal right now is probably to sell as many PS5 as possible? Wouldnt this just create FOMO for PS6 and make people wait instead of buying PS5?

Sony afraid of NextBox marketing perhaps?

 

[soresu]

or not.
god NV documentation is painfully obtuse when it comes to arch-specific features.

Now you see the problem I was having trying to follow your answers 😂

 

[soresu]

Wouldnt this just create FOMO for PS6 and make people wait instead of buying PS5?

Looooong time to wait if so.

It's not coming any earlier than late 2027, and more likely no earlier than mid/late 2028 due to lost sales during COVID supply chain kerfuffles.

 

[adroc_thurston]

Looooong time to wait if so.

It's not coming any earlier than late 2027, and more likely no earlier than mid/late 2028 due to lost sales during COVID supply chain kerfuffles.

They're both holidays 2027.

 

[Saylick]

@adroc_thurston: any hints as to wtf the Radiance Cores are?

 

[adroc_thurston]

any hints as to wtf the Radiance Cores are?

They're just throwing marketing sludge out.
Just forget about it.

 

[SolidQ]

any hints as to wtf the Radiance Cores are?

Here in topic was this - https://www.freepatentsonline.com/y2025/0104328.html

 

[Kepler_L2]

So basically it's an inter CU data network within each SE?

Workgroup clusters + globally accessible LDS

[AMDGPU][gfx1250] Support "cluster" syncscope by Pierre-vh · Pull Request #157641 · llvm/llvm-project

Defaults to "agent" for targets that do not support it. Add documentation Register it in MachineModuleInfo Add MemoryLegalizer support

github.com

Sony afraid of NextBox marketing perhaps?

Probably getting ahead of gfx13 LLVM upstreaming

@adroc_thurston: any hints as to wtf the Radiance Cores are?

Just a fancy name for the new RT core

 

[MrMPFR]

oh no there's much more than that.

Cache related?

no.

They specifically mentioned BVH traversal in HW, which NVIDIA and Intel implemented from the start, so what's wrong with @Win2012R2's comment?

SE.
They're doing LDS to LDS transfers.
Boring.

If it's boring then why did they make such a big fuss about it from 2:05-3:41. First Cerny talks about the issue of subdividing ML work. Huynh then introduces Neural Arrays and how they work, and near the end Cerny talks about why processing a large chunk of the screen at once is a game changer for the post FSR Redstone technologies.
Just more marketing blurbs?

They're just throwing marketing sludge out.
Just forget about it.

So none of this should be taken seriously and will have zero implications for RDNA 5? Why hype tech for GPU IP that won't be used till mid to late 2027 if it's not a big deal? Makes zero sense. Regardless it seems a bit odd to spend time on it this early, especially the part about crashing Intel's Panther Lake tech unveil, when they could've easily waited till their Financial Analyst Day.

 

[adroc_thurston]

Cache related?

kind of.

They specifically mentioned BVH traversal in HW, which NVIDIA and Intel implemented from the start, so what's wrong with @Win2012R2's comment?

because they don't really do it like anyone else.

If it's boring then why did they make such a big fuss about it from 2:05-3:41. First Cerny talks about the issue of subdividing ML work. Huynh then introduces Neural Arrays and how they work, and near the end Cerny talks about why processing a large chunk of the screen at once is a game changer for the post FSR Redstone technologies.
Just more marketing blurbs?

I mean it's all dumb PR.
DSMEM is really not that relevant outside of tiny subset of **really** performant CUDA kernels.
You can go annoy CUTLASS guys on xitter for that.

So none of this should be taken seriously and will have zero implications for RDNA 5?

RDNA5 will have more stuff.

Why hype tech for GPU IP that won't be used till mid to late 2027 if it's not a big deal?

was it really hype.
They just talked a bit about challenges ahead.

when they could've easily waited till their Financial Analyst Day.

FAD is for roadmaps and serious people, not console toddlerslop. get real.

 

[soresu]

FAD is for roadmaps and serious people, not console toddlerslop. get real.

Well I mean, semi custom does at least get discussed, if only as a point of recent revenue which is what the share holders are listening for.