Question Raptor Lake - Official Thread

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Hulk

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Oct 9, 1999
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Since we already have the first Raptor Lake leak I'm thinking it should have it's own thread.
What do we know so far?
From Anandtech's Intel Process Roadmap articles from July:

Built on Intel 7 with upgraded FinFET
10-15% PPW (performance-per-watt)
Last non-tiled consumer CPU as Meteor Lake will be tiled

I'm guessing this will be a minor update to ADL with just a few microarchitecture changes to the cores. The larger change will be the new process refinement allowing 8+16 at the top of the stack.

Will it work with current z690 motherboards? If yes then that could be a major selling point for people to move to ADL rather than wait.
 
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nicalandia

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This rumor was a 13900, not a 13900K.
We are still extrapolating this data(for this ES 13900 non K/F/KS) for performance right? Also was your statement about pricing about this ES 13900 CPU? Or Raptor Lake in General? Because I was mentioning the possible price bracket of 13900K which is going to be on the same bracket for 7950X
 

dullard

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May 21, 2001
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We are still extrapolating this data(for this ES 13900 non K/F/KS) for performance right? Also was your statement about pricing about this ES 13900 CPU? Or Raptor Lake in General?
I was mentioning this specific 13900 chip. If it is priced near the $489 12900 (about the rumored 7800x price), then it will be a compelling chip to wait for if you have heavy multi-threaded needs. But, if it is priced terribly, then Raptor Lake isn't worth the pixels we are using to talk about it. My point was basically that engineering vs final silicon is one thing, but pricing is what makes or breaks a chip.
 
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IntelUser2000

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The final tweaks will gain a percent here or a percent there. That will make the gaming roughly even and the multi-threaded tasks in the lower 20% range better than Alder Lake.

We argue about single digit differences right? But we're still undecided on whether the clocks are stable or not. It's a completely silly thing.

Depending on how early it is even per clock differences can have upwards of 5%+ swing in average nevermind in corner case scenarios.

Combine those two you can go from 10% deficit to 10% lead easy even for single thread.
 
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dullard

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I don't think power was the primary limiting factor for Alder Lake....
Raptor Lake is rumored to have a new Raptor Cove core, more cores, more cache, higher frequency, and faster memory support. If power wasn't the problem, what else is left (other than switching to TSMC)?

A lot of the remaining debate is about whether or not Raptor Lake desktop will have improved power delivery. @igor_kavinski does have a point. With the P cores and E cores having linked power supplies in Alder Lake, any increase to the P core frequency (which usually requires a higher voltage) pushes the E cores way past their optimum point on the performance/power curve. The P core, E core, and ring all had the same input voltage. Increasing the voltage for one portion required too high of a voltage for any of the other portions resulting in a much worse ability to reach high clock speeds.
 
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pakotlar

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Aug 22, 2003
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Raptor Lake is rumored to have a new Raptor Cove core, more cores, more cache, higher frequency, and faster memory support. If power wasn't the problem, what else is left (other than switching to TSMC)?

A lot of the remaining debate is about whether or not Raptor Lake desktop will have improved power delivery. @igor_kavinski does have a point. With the P cores and E cores having linked power supplies in Alder Lake, any increase to the P core frequency (which usually requires a higher voltage) pushes the E cores way past their optimum point on the performance/power curve. The P core, E core, and ring all had the same input voltage. Increasing the voltage for one portion required too high of a voltage for any of the other portions resulting in a much worse ability to reach high clock speeds.

Most of the speculation about improved power efficiency for Raptor Lake is exactly because of what you mention. To be seen how much it impacts things.
 

Anhiel

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May 12, 2022
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The recent leaks are messy with the data provide... but I still get a good picture given the following assumption and basically confirmed past results. I'm not going into more details on how it was done for reasons ;)
matching the results I'm assuming as follows
12900K was p-cores@3.8GHz and e-cores@2GHz
13900 ES was p-cores@3.8GHz and half e-cores@2.8GHz and @1GHz
all test running at these max speeds
This gives an IPC gain of 10% +-0.1

Last time using it was 12-13%.

So I assume it's average is indeed ~10% and may vary depending on test/software/games by ~3%
 

cortexa99

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Jul 2, 2018
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Dunno, seems strange they are regressing in ST performance in this fixed comparison at static 3.8ghz
Maybe Raptor Lake took a large latency hit from doubling the L2 cache (?)
..Or its the extra stops on the ringbus that's hurting gaming performance ?

This Raptor sample with literally same clock as ADL, has very similar gaming performance, ADL has ~1-4% advantage, and ~3% in CSGO is convincing evidence that clocks similar.
It's safe bet ADL could use more power than this RPL sample to maintain clock, which means this Raptor has a bit lower clock than ADL
But CB ST perf regression is even larger than gaming, which means,,,, you're maybe right, the doubling L2 which has higher latency seems to have negative hit in usual IPC.

That's why I don't use ES sample to set any perf number in stone. Same with Zen4 and others.

The Ring buss speed takes a huge hit when the 8 e cores are used. The penalties are higher with 16 e cores
Yeah. But what's worth mentioning is at least bottlenecked ring bus doesn't hurt IPC ;)
 
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DrMrLordX

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The Ring buss speed takes a huge hit when the 8 e cores are used. The penalties are higher with 16 e cores

That would not be an issue in an ST benchmark.

The E-cores were getting boosted to 3.9 GHz in ADL. With the revamped clock domains, they will consume less power, which means the P-cores can boost higher. Maybe this is the secret to Raptor Lake reaching 6 GHz.

But there are potentially twice as many E-cores on Raptor Lake. Overall the E-core clusters will consume more power, leaving less power budget for the P-cores in embarrassingly-parallel workloads.
 
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But there are potentially twice as many E-cores on Raptor Lake. Overall the E-core clusters will consume more power, leaving less power budget for the P-cores in embarrassingly-parallel workloads.
But do the P-cores really need to clock to the moon in embarrassingly-parallel workloads? I think this time around Intel will be using very fine grained power management to ensure that the cores do not venture into the too-high-voltage-not-that-much-performance-benefit territory.
 

DrMrLordX

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But do the P-cores really need to clock to the moon in embarrassingly-parallel workloads?

No. But. If you expect there to be more or less power budget for the P-cores, then the E-cores have to be doing something for that calculation to be relevant. The only situation where that load is not completely arbitrary is in a scenario like Blender et al where all cores are being put to use. And I was merely pointing out that doubling the Gracemont core count would actually leave less overall power budget for the P-cores, assuming the E-cores are doing anything.
 

pakotlar

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Aug 22, 2003
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This Raptor sample with literally same clock as ADL, has very similar gaming performance, ADL has ~1-4% advantage, and ~3% in CSGO is convincing evidence that clocks similar.
It's safe bet ADL could use more power than this RPL sample to maintain clock, which means this Raptor has a bit lower clock than ADL
But CB ST perf regression is even larger than gaming, which means,,,, you're maybe right, the doubling L2 which has higher latency seems to have negative hit in usual IPC.

That's why I don't use ES sample to set any perf number in stone. Same with Zen4 and others.


Yeah. But what's worth mentioning is at least bottlenecked ring bus doesn't hurt IPC ;)

it does not have the same clock as ADL. Its boost clock is the same, TDP is 1/2, base clock is < 1/2 (1.4ghz).
 
Jul 27, 2020
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And I was merely pointing out that doubling the Gracemont core count would actually leave less overall power budget for the P-cores, assuming the E-cores are doing anything.
True. It's not just power though. Previously, boosting P-core voltage for higher turbo boosting would run the same high voltage through the E-cores too, increasing the heat required to be dissipated and limiting the thermal headroom of the P-cores. Now that extra heat won't come from the E-cores anymore because they will be on a different clock domain altogether. So theoretically, P-cores should be able to boost higher and not hit their thermal limits as often as before.
 
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Jun 24, 2022
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I plan on disabling all E-cores and only running the 13900KS 8 P-cores at stock, along with Enhanced Thermal Velocity Boost if my very short single-radiator water loop can handle the load. ROG bios rates the loop at 184 cooling points.

Have no idea if that cooling value is substantial enough to achieve Velocity Boost.

Rumors are 5.6Ghz to 5.8Ghz single core boost, yet only rumors at this point.
IMG_0506.JPG
 
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IntelUser2000

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@DrMrLordX @igor_kavinski

You guys do know the ES Raptorlake is 20% faster in MT despite being 10% slower in ST?

Despite the "suboptimal voltage planes" you guys are talking about, the EIGHT Gracemont cores still only take 20% of the TDP while a single P core with Gracemont off can take 30W+ all by itself. Cutting 10% off 50W only results in 5W reduction, while cutting off 10% off 200W results in a whopping 20W reduction, almost entirely affording power budget for double Gracemont clusters.

The slight reduction in P core clock is necessary to fit the 8 extra Gracemont cores, otherwise you'd need to reduce the clocks of Gracemont clusters much more resulting in performance gains far lower. This is what some of us meant when we said Alderlake is a mobile chip repurposed for desktop - 8P + 8E needed to be pushed beyond it's optimal zone to compete with 16 Zen 3 cores. Raptorlake with 8+16 is far more optimal.

The reduction in performance is in single thread. It shouldn't have to do anything with Gracemont since only one core is running.

@nicalandia It'll probably help in corner case scenarios where there are conflicts between the two CPU zones and in cases where the ring has to be downclocked. If Raptorlake "fixes" the ring bus issue then it just leaves the issues with hybrid complexity.

According to the rumors the P core is a Raptor Cove with slightly improved architecture. They were talking about how there are features that were yet to be enabled in Golden Cove that'll be with Raptor Cove. Probably couldn't make it into design. That's what Tick was for.
 
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Would there be any noticeable performance difference between a 12700K and a 13900K if all e cores were disabled on both chips? I really doubt there will be any
From your perspective, you may be correct.

Yet the logical response would be - it's simply too early to determine, and "noticeable" sounds quite subjective at best.

From my perspective, moving from a Rocket Lake i5 11600K at 5.5Ghz to a Raptor Lake 13900KS at 5.8Ghz, if the early rumors are true I may see a 30% improvement in ST performance - it's simply too early to determine.

And frankly, after 12months RKL is getting a bit boring. :)
11600K 5.5Ghz.jpg
 
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nicalandia

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From my perspective, moving from a Rocket Lake i5 11600K at 5.5Ghz to a Raptor Lake 13900KS at 5.8Ghz, if the early rumors are true I may see a 30% improvement in ST performance - it's simply too early to know.

View attachment 63596
Or... Get a 12700K disable e cores, OC it to 5 Ghz save the $500 difference between a 12700K and 13900K and put it towards a High End GPU and RAM.
 

IntelUser2000

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Why is that a surprise when it has 40% more cores?

It's not. I am responding to @igor_kavinski and @DrMrLordX that the whole argument about suboptimal voltage planes is already moot when the ES with supposedly downclocking and other issues is beating 12900K by 20%. The thing we are wondering about is in Single Thread which has NOTHING to do with what they are talking about.

But do the P-cores really need to clock to the moon in embarrassingly-parallel workloads? I think this time around Intel will be using very fine grained power management to ensure that the cores do not venture into the too-high-voltage-not-that-much-performance-benefit territory.

P cores in Alderlake isn't running to the moon because of lack of fine grained power management, it does so because otherwise it wouldn't have had chance in hell of getting close to 5950X, nevermind beating it in some scenarios. That's why you can reduce performance of 12900K by 10% or so but cut power use by half from 250W to 125W.
 
Jun 24, 2022
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Or... Get a 12700K disable e cores, OC it to 5 Ghz save the $500 difference between a 12700K and 13900K and put it towards a High End GPU and RAM.
The 13900KS will be my 1st 8core processor and I've already made the decision not to overclock it. It's a work computer that doesn't rely on sustained CPU loading, only need quick bursts of ST performance while working. Coupled with a new PCIe 5.0 NVMe SSD and the fastest Gskill Hynix DDR5 kit available mounted to the ROG Z790 Apex 2dimm board, I should do ok. ;)

Only the 13900K and 13900KS will offer the highest single thread burst frequencies.

Currently I'm running a Gskill DDR4 kit at 5866Mhz CL21 daily and my work apps really LOVE high-bandwidth mem kits.