"RAM" Locks?

[The Pentium Guy]

Wondering if this is possible in any way.... you'd get insane clocks this way.

 

[qbackin]

What?

 

[Appledrop]

he means to lock ram async with fsb, like a pci lock. Would be cool!

 

[Concillian]

Well, A64s essentially lock the RAM separate from "FSB"

On an Intel system it wouldn't make much sense since FSB bandwidth is equivalent to RAM bandwidth in most cases. I guess if you wanted to keep RAM speed lower than FSB it might work, but isn't this what dividers are for?

"Locking" frequency without a divider would not eliminate the performance issues from using a divider, because the memory controller is still dependent on two separate busses (memory bus and FSB) you would still be async with the FSB and that would introduce the same latency/bandwidth issues that currently occur with a divider on Intel designs.

The only way to eliminate the performance disadvantage of using different memory and bus speeds is to do like in the A64 design and make the memory speed an integer divided by bus speed, which would ensure they are sync'ed. But the Intel FSB isn't high enough frequency to be able to do this adequately... you would have a very limited number of speeds available. AMD can do it because they are using the processor speed as a basis for the divider, and that is 8-12x higher than the memory speed, so you have a reasonable number of frequencies available that are sync'ed.