Itanium is priced as high as it is only because of its target market. Itanium chips are geared towards high-end applications. CPUs designed for that market carry high premiums. That is the only reason Itanium carries such a high price tag. The inclusion of a massive L2 and L3 cache is entirely due to the target market.
Itanium's lackluster adoption is more closely related to its architectural philosophy. VLIW design is a relatively new technology and somewhat of a mix of vector and superscalar philosophies. Itanium is a somewhat strange architecture.
If you look closely at modern x86 processors, you will find a RISC processor coupled with a translator. Most designs use hardware, but Transmeta decided to go with a software compiler.
x86, as far as I know, is only moderately decent at running a broad range of software. The only reason x86 processors perform relatively well as compared to other processors with different ISAs is because Intel and AMD took a brute force approach and scaled clock speeds as high as possible. Intel and AMD have long histories in semiconductor fabrication and have been able use that experience to tweak x86 processors faster than other designs.
RDRAM is technically superior to DDR DRAM in much the same way PowerPC architectures are superior to x86. For the same reasons, DDR DRAM runs as well or better; more investment. Market momentum and cost are very important factors in technology, as evidenced by the demise of Beta. The majority of end users care only about the short term, and history is rife with examples of short-sided views leading to pitfalls later on.
I'm not too familiar with Sparc designs, but I am quite sure the PowerPC specification started out with 64-bit code. If I remember correctly, PowerPC was developed as a software specification. It gave no guidelines for the actual hardware. The implementation of 32-bit data paths in the old PowerPC chips was probably due to market forces. 64-bit code was probably very rare and/or unneeded, so software emulation would have sufficed.
Itanium's lackluster adoption is more closely related to its architectural philosophy. VLIW design is a relatively new technology and somewhat of a mix of vector and superscalar philosophies. Itanium is a somewhat strange architecture.
If you look closely at modern x86 processors, you will find a RISC processor coupled with a translator. Most designs use hardware, but Transmeta decided to go with a software compiler.
x86, as far as I know, is only moderately decent at running a broad range of software. The only reason x86 processors perform relatively well as compared to other processors with different ISAs is because Intel and AMD took a brute force approach and scaled clock speeds as high as possible. Intel and AMD have long histories in semiconductor fabrication and have been able use that experience to tweak x86 processors faster than other designs.
RDRAM is technically superior to DDR DRAM in much the same way PowerPC architectures are superior to x86. For the same reasons, DDR DRAM runs as well or better; more investment. Market momentum and cost are very important factors in technology, as evidenced by the demise of Beta. The majority of end users care only about the short term, and history is rife with examples of short-sided views leading to pitfalls later on.
I'm not too familiar with Sparc designs, but I am quite sure the PowerPC specification started out with 64-bit code. If I remember correctly, PowerPC was developed as a software specification. It gave no guidelines for the actual hardware. The implementation of 32-bit data paths in the old PowerPC chips was probably due to market forces. 64-bit code was probably very rare and/or unneeded, so software emulation would have sufficed.