Originally posted by: N8Magic
Originally posted by: LeeTJ
ya, that was an interesting thing back then. i think the 8086 came first right?? but intel felt that no one would need a true 16 bit chip so they made the 8088. more or less a crippled 8086.
You got it.
Consider it to be the Celeron of it's generation.
hehehe
celeron??
let's do this right.
8088, then 386SX, then 486SX, then Celeron. yes?
JC
Diamond Member
- Feb 1, 2000
- 5,854
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Originally posted by: LeeTJ
Originally posted by: N8Magic
Originally posted by: LeeTJ
ya, that was an interesting thing back then. i think the 8086 came first right?? but intel felt that no one would need a true 16 bit chip so they made the 8088. more or less a crippled 8086.
You got it.
Consider it to be the Celeron of it's generation.
hehehe
celeron??
let's do this right.
8088, then 386SX, then 486SX, then Celeron. yes?
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
AIR....Originally posted by: JC
Originally posted by: LeeTJ
Originally posted by: N8Magic
Originally posted by: LeeTJ
ya, that was an interesting thing back then. i think the 8086 came first right?? but intel felt that no one would need a true 16 bit chip so they made the 8088. more or less a crippled 8086.
You got it.
Consider it to be the Celeron of it's generation.
hehehe
celeron??
let's do this right.
8088, then 386SX, then 486SX, then Celeron. yes?
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
no, it wasn't crippled, but it was a 16 bit chip right?? it shouldn't have been labeled 386.
A 6502 slightly modified (was it just the memory bank switching that was added? It's been almost 15 years(!) since I've done any 6502 coding)
geno
Lifer
- Dec 26, 1999
- 25,074
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Originally posted by: N8Magic
Originally posted by: geno
Which one was the NES's CPU? I remember it being the 6409 or something? Can't remember - but that's my fav
Modified Motorola 6502 processor.
Did I get the number right at least?
In what ways was it modded?Originally posted by: LeeTJ
no, it wasn't crippled, but it was a 16 bit chip right?? it shouldn't have been labeled 386.Originally posted by: JC
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
8088 = crippled memory bus (8 bit vs 16 for 8086)
386sx = crippled memory bus (16 vs 32 for 386DX)
486sx = crippled floating point (coproccesor burned off)
celeron = crippled FSB and cache
Where "celeron" crippling covers all eras from p2 to p4. Best-crippled were the 266 and 300 non-"a" with 0K cache, slower than p1.
2A03 @ 1.7MHz, based on 6502 design. The SNES by the way used the 65816, a superset of the 6502, and the same chip used in the Apple //GS.
Originally posted by: geno
Which one was the NES's CPU? I remember it being the 6409 or something? Can't remember - but that's my fav
Originally posted by: DaveSimmons
Originally posted by: LeeTJ
no, it wasn't crippled, but it was a 16 bit chip right?? it shouldn't have been labeled 386.Originally posted by: JC
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
8088 = crippled memory bus (8 bit vs 16 for 8086)
386sx = crippled memory bus (16 vs 32 for 386DX)
486sx = crippled floating point (coproccesor burned off)
celeron = crippled FSB and cache
Where "celeron" crippling covers all eras from p2 to p4. Best-crippled were the 266 and 300 non-"a" with 0K cache, slower than p1.
yup, that's the way i remember it.
JC, all x86 cpu's prior to 486DX had coprocessors separate from cpu.
Linflas
Lifer
- Jan 30, 2001
- 15,395
- 78
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JC
Diamond Member
- Feb 1, 2000
- 5,854
- 73
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Originally posted by: LeeTJ
Originally posted by: DaveSimmons
Originally posted by: LeeTJ
no, it wasn't crippled, but it was a 16 bit chip right?? it shouldn't have been labeled 386.Originally posted by: JC
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
8088 = crippled memory bus (8 bit vs 16 for 8086)
386sx = crippled memory bus (16 vs 32 for 386DX)
486sx = crippled floating point (coproccesor burned off)
celeron = crippled FSB and cache
Where "celeron" crippling covers all eras from p2 to p4. Best-crippled were the 266 and 300 non-"a" with 0K cache, slower than p1.
yup, that's the way i remember it.
JC, all x86 cpu's prior to 486DX had coprocessors separate from cpu.
Ah, thanks for the refresher, guys! So many memories....some of them inaccurate!
Linflas
Lifer
- Jan 30, 2001
- 15,395
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- 91
Originally posted by: LeeTJ
Originally posted by: DaveSimmons
Originally posted by: LeeTJ
no, it wasn't crippled, but it was a 16 bit chip right?? it shouldn't have been labeled 386.Originally posted by: JC
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
8088 = crippled memory bus (8 bit vs 16 for 8086)
386sx = crippled memory bus (16 vs 32 for 386DX)
486sx = crippled floating point (coproccesor burned off)
celeron = crippled FSB and cache
Where "celeron" crippling covers all eras from p2 to p4. Best-crippled were the 266 and 300 non-"a" with 0K cache, slower than p1.
yup, that's the way i remember it.
JC, all x86 cpu's prior to 486DX had coprocessors separate from cpu.
Didn't the 486 SX boards have a slot for a "math co-processor" which was the identical chip with the CPU portion disabled and just the math processor enabled?
JC
Diamond Member
- Feb 1, 2000
- 5,854
- 73
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Originally posted by: Linflas
Originally posted by: LeeTJ
Originally posted by: DaveSimmons
Originally posted by: LeeTJ
no, it wasn't crippled, but it was a 16 bit chip right?? it shouldn't have been labeled 386.Originally posted by: JC
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
8088 = crippled memory bus (8 bit vs 16 for 8086)
386sx = crippled memory bus (16 vs 32 for 386DX)
486sx = crippled floating point (coproccesor burned off)
celeron = crippled FSB and cache
Where "celeron" crippling covers all eras from p2 to p4. Best-crippled were the 266 and 300 non-"a" with 0K cache, slower than p1.
yup, that's the way i remember it.
JC, all x86 cpu's prior to 486DX had coprocessors separate from cpu.
Didn't the 486 SX boards have a slot for a "math co-processor" which was the identical chip with the CPU portion disabled and just the math processor enabled?
Well, at least some of 'em did....socket for a 80487 coprocessor.
8510 owns.
It was the 6502 version used in the C128. Cabable of running 2MHz insread of 1. Aaah remember software overclocking my C128 to run faster than 1MHz despite the video chip.
Set clock speed to 2MHz when screen was drawn and then clock down to 1 MHz just before the next screen. Mmmmm raster interupt at adress x314.
It was the 6502 version used in the C128. Cabable of running 2MHz insread of 1. Aaah remember software overclocking my C128 to run faster than 1MHz despite the video chip.
Set clock speed to 2MHz when screen was drawn and then clock down to 1 MHz just before the next screen. Mmmmm raster interupt at adress x314.
- Oct 10, 1999
- 31,309
- 12,824
- 136
If you are programming in BASIC, you just used the FAST command to enable 2mghz. It really sped things up.
Normal C64 ran at 1mghz (more or less) VIC20 ran a little faster.
Originally posted by: Linflas
Originally posted by: LeeTJ
Originally posted by: DaveSimmons
Originally posted by: LeeTJ
no, it wasn't crippled, but it was a 16 bit chip right?? it shouldn't have been labeled 386.Originally posted by: JC
Well, to be fair, the 386SX wasn't a crippled 386DX...the copro was separate in those days
8088 = crippled memory bus (8 bit vs 16 for 8086)
386sx = crippled memory bus (16 vs 32 for 386DX)
486sx = crippled floating point (coproccesor burned off)
celeron = crippled FSB and cache
Where "celeron" crippling covers all eras from p2 to p4. Best-crippled were the 266 and 300 non-"a" with 0K cache, slower than p1.
yup, that's the way i remember it.
JC, all x86 cpu's prior to 486DX had coprocessors separate from cpu.
Didn't the 486 SX boards have a slot for a "math co-processor" which was the identical chip with the CPU portion disabled and just the math processor enabled?
yes they did. it was real cute how it worked. the 486sx was a 486dx with the math coprocessor disabled. the "math coprocessor" socket took a 486dx that would disable the 486sx. but it wouldn't take just any 486dx, it had to be a 486dx labeled as a math coprocessor.
very cute. very bad engineeriing.
DivideBYZero
Lifer
- May 18, 2001
- 24,117
- 2
- 0
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